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| 型号： | FTLF8524E2GNV |
| 元件分类： | 光收发 |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 830-860nm, 4250Mbps(Tx), 4250Mbps(Rx), THROUGH HOLE MOUNT, LC CONNECTOR |
| 文件页数： | 3/10页 |
| 文件大小： | 351K |
| 代理商： | FTLF8524E2GNV |
FTLF8524E2xNy 2x7 Pin SFF Product Specification – July 2005
Finisar Corporation July 12, 2005 RevG
Page 2
I.
Pin Descriptions
Pin
Symbol
Name/Description
Logic Family
MS
Mounting Studs are for mechanical attachment and are connected to
chassis ground. Chassis ground is internally isolated from circuit
grounds. Connection to user’s ground plane is recommended.
NA
1
VEER
Receiver Ground (Common with Transmitter Ground)
NA
2
VCCR
Receiver Power Supply
NA
3
SD
Signal Detect. Logic 1 indicates normal operation.
LVTTL
4
RD-
Receiver Inverted DATA out. AC Coupled
See Rx spec.
5
RD+
Receiver Non-inverted DATA out. AC Coupled
See Rx spec.
6
VCCT
Transmitter Power Supply
NA
7
VEET
Transmitter Ground (Common with Receiver Ground)
NA
8
TDIS
Transmitter Disable
LVTTL
9
TD+
Transmitter Non-Inverted DATA in. AC Coupled.
See Tx spec.
10
TD-
Transmitter Inverted DATA in. AC Coupled
See Tx spec.
A
SDA
Two Wire Digital Diagnostics Data Interface
See Note 1
B
SCL
Two Wire Digital Diagnostics Clock Interface
See Note 1
C
Rate
Select
Open or Low =
High =
1.063 Gb/s or 2.125 Gb/s Fibre Channel,
(Low Bandwidth)
2.125 or 4.25 Gb/s Fibre Channel (High Bandwidth)
LVTTL
See Note 2
D
Reserved
NA
Notes:
1. Should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and VCC.
2. For Rate Selectable version only: In accordance with SFF Committee SFF-8079 Draft Rev. 1.6,
Table 3. Note that rate select can also be set through 2-wire bus in accordance with SFF-84725 at Bit
3, Byte 110, Address A2h (note: writing ‘1’ selects full bandwidth operation). Rate select is the logic
OR of the input state of Rate Select Pin and 2-wire bus. Non Rate Selectable version can operate at 1x,
2x, 4x Fibre Channel independent of rate select pin setting.
TOP VIEW
C A 1
…
5
D B 10 …
6
MS
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