参数资料
型号: FXL4TD245UMX
厂商: Fairchild Semiconductor
文件页数: 8/14页
文件大小: 0K
描述: TRANSLATOR 4BIT DUAL VOLT 16UMLP
标准包装: 1
逻辑功能: 变换器,双向,3 态
位数: 4
输入类型: 电压
输出类型: 电压
通道数: 1
输出/通道数目: 4
差分 - 输入:输出: 无/无
传输延迟(最大): 3.5ns
电源电压: 1.1 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 16-UMLP
供应商设备封装: 16-UMLP(1.8x2.6)
包装: 标准包装
其它名称: FXL4TD245UMXDKR
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL4TD245 Rev. 1.0.6
3
FXL4TD2
4
5
Low
-V
olt
a
ge
Dual-Supply
4
-Bi
tSignal
T
ransl
ator
w
it
h
Conf
igura
b
le
V
o
lt
a
g
e
Supplie
s
a
nd
Si
gnal
Leve
ls
and
3
-S
T
A
T
E
Output
s
and
Inde
pendent
Dire
ction
Controls
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Don't Care
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0 volts, outputs are in
a HIGH-Impedance state. The control inputs (T/Rn and
OE) are designed to track the VCCA supply. A pull-up
resistor tying OE to VCCA should be used to ensure that
bus contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
up resistor is based upon the current-sinking capability of
the OE driver.
The recommended power-up sequence is the following:
1. Apply power to either VCC.
2. Apply power to the T/Rn inputs (Logic HIGH for A-to-B
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
3. Apply power to other VCC.
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the following:
1. Drive OE input HIGH to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Inputs
Outputs
OE T/R0 T/R1 T/R2 T/R3
L
X
B0 Data to A0 Output
L
H
X
A0 Data to B0 Output
L
X
L
X
B1 Data to A1 Output
L
X
H
X
A1 Data to B1 Output
L
X
L
X
B2 Data to A2 Output
L
X
H
X
A2 Data to B2 Output
L
X
L
B3 Data to A3 Output
L
X
H
A3 Data to B3 Output
H
X
3-State
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