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参数资料
| 型号： | FXMAR2102L8X |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 3/16页 |
| 文件大小： | 0K |
| 描述： | TRANSLATOR 2BIT DUAL 8-MICROPAK |
| 标准包装： | 5,000 |
| 逻辑功能： | 变换器，双向，3 态，开路漏极 |
| 位数： | 2 |
| 输入类型： | 电压 |
| 输出类型： | 电压 |
| 数据速率： | * |
| 通道数： | 2 |
| 输出/通道数目： | 1 |
| 差分 - 输入:输出： | 无/无 |
| 传输延迟（最大）： | 4ns |
| 电源电压： | 1.65 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXMAR2102 Rev. 1.0.1
11
FXMAR2102
—
Dual-Supply,
2-Bit
Volt
age
Translator
/
Isolator
for
I
2
C
Application
s
AC Characteristics
(15)
Output Load: CL = 50pF, RPU = NC, push / pull driver, and TA = -40°C to +85°C.
Symbol
Parameter
VCCB
Units
4.5 to 5.5V
3.0 to 3.6V
2.3 to 2.7V
1.65 to 1.95V
Typ.
Max.
Typ.
Max.
Typ.
Max.
Typ.
Max.
VCCA = 4.5 to 5.5V
tPLH
A to B
1
3
1
3
1
3
1
3
ns
B to A
1
3
2
4
3
5
4
7
tPHL
A to B
2
4
3
5
4
6
5
7
ns
B to A
2
4
2
5
2
6
5
7
tPZL
OE to A
4
5
6
10
5
9
7
15
ns
OE to B
3
5
4
7
5
8
10
15
tPLZ
OE to A
65
100
65
105
65
105
65
105
ns
OE to B
5
9
6
10
7
12
9
16
tskew
A Port, B Port(16)
0.50
1.50
0.50
1.00
0.50
1.00
0.50
1.00
ns
VCCA = 3.0 to 3.6V
tPLH
A to B
2.0
5.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
B to A
1.5
3.0
1.5
4.0
2.0
6.0
3.0
9.0
tPHL
A to B
2.0
4.0
2.0
4.0
2.0
5.0
3.0
5.0
ns
B to A
2.0
4.0
2.0
4.0
2.0
5.0
3.0
5.0
tPZL
OE to A
4.0
8.0
5.0
9.0
6.0
11.0
7.0
15.0
ns
OE to B
4.0
8.0
6.0
9.0
8.0
11.0
10.0
14.0
tPLZ
OE to A
100
115
100
115
100
115
100
115
ns
OE to B
5
10
4
8
5
10
9
15
tskew
A Port, B Port
(16)
0.5
1.5
0.5
1.0
0.5
1.0
0.5
1.0
ns
VCCA = 2.3 to 2.7V
tPLH
A to B
2.5
5.0
2.5
5.0
2.0
4.0
1.0
3.0
ns
B to A
1.5
3.0
2.0
4.0
3.0
6.0
5.0
10.0
tPHL
A to B
2.0
5.0
2.0
5.0
2.0
5.0
3.0
6.0
ns
B to A
2.0
5.0
2.0
5.0
2.0
5.0
3.0
6.0
tPZL
OE to A
5.0
10.0
5.0
10.0
6.0
12.0
9.0
18.0
ns
OE to B
4.0
8.0
4.5
9.0
5.0
10.0
9.0
18.0
tPLZ
OE to A
100
115
100
115
100
115
100
115
ns
OE to B
65
110
65
110
65
115
12
25
tskew
A Port, B Port
(16)
0.5
1.5
0.5
1.0
0.5
1.0
0.5
1.0
ns
VCCA = 1.65 to 1.95V
tPLH
A to B
4
7
4
7
5
8
5
10
ns
B to A
1.0
2.0
1.0
2.0
1.5
3.0
5.0
10.0
tPHL
A to B
5
8
3
7
3
7
3
7
ns
B to A
4
8
3
7
3
7
3
7
tPZL
OE to A
11
15
11
14
28
14
23
ns
OE to B
6
14
6
14
6
14
9
16
tPLZ
OE to A
75
115
75
115
75
115
75
115
ns
OE to B
75
115
75
115
75
115
75
115
tskew
A Port, B Port
(16)
0.5
1.5
0.5
1.0
0.5
1.0
0.5
1.0
ns
Notes:
15. AC characteristics are guaranteed by design and characterization.
16. Skew is the variation of propagation delay between output signals and applies only to output signals on the same
port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 15). Skew is
guaranteed; not production tested.
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