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参数资料
| 型号： | G699 |
| 厂商： | Global Mixed-mode Technology Inc. |
| 元件分类： | 复位半导体 |
| 英文描述： | Microprocessor Reset IC |
| 中文描述： | 微处理器复位IC |
| 文件页数： | 6/8页 |
| 文件大小： | 191K |
| 代理商： | G699 |
Ver: 1.3
Jun 03, 2004
TEL: 886-3-5788833
http://www.gmt.com.tw
6
G698/G699
Global Mixed-mode Technology Inc.
Pin Description
PIN
NAME
FUNCTION
1
CD
External Programmable time delay is set by the capacitor connect to CD pin.
2.3
GND
Ground
RESET
(G698L/G699L)
RESET
Output remains low while VCC is below the reset threshold, and for delay time set by CD
after VCC rises above the reset threshold.
4
RESET (G698H)
RESET Output remains high while VCC is below the reset threshold, and for delay time set by
CD after VCC rises above the reset threshold.
5
VCC
Supply Voltage (+5V, +3.3V, +3.0V)
Detailed Description
A microprocessor’s (P’s) reset input starts the P in a
known state. The G699L/G698L/G698H assert reset to
prevent code-execution errors during power-up,
power-down, or brownout conditions. They assert a
reset signal whenever the VCC supply voltage declines
below a preset threshold (VTH-), keeping it asserted for
time delay set by capacitor connected to CD pin, after
VCC has risen above the high reset threshold VTH+
(VTH-+VHYS). The G699L uses an open-drain output,
and the G698L/G698H have a push-pull output stage.
Connect a pull-up resistor on the G699L’s RESET out-
put to any supply between 0 and 5.5V.
The time delay is set by external capacitor CD, and
internal pull up current ICD. When the voltage at CD
pin exceeds the buffer threshold, typically 1.25V, the
RESET output high (RESET output low). The volt-
age detector and buffer have built-in hysterisis to
prevent erratic reset operation. The formula of time
delay is T (ms)
1685 CD (F). Fig1 and Fig2 show a
timing deagram and a Functional Block.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 0.8V, the G698 RESET output
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since
most P and other circuitry is inoperative with VCC
below 0.8V. However, in applications where RESET
must be valid down to 0V, adding a pull-down resistor
to RESET causes any stray leakage currents to flow
to ground, holding RESET low (Figure 3). R1’s value
is not critical; 100k
is large enough not to load
RESET and small enough to pull RESET to ground.
A 100k
pull-up resistor to VCC is also recommended
for the G699L if RESET is required to remain valid
for VCC < 0.8V.
Figure3. RESET Valid to VCC = Ground Circuit
VCC
RESET
GND
G698
R1
100k
VCC
RESET
GND
G698
R1
100k
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相关代理商/技术参数 |
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| G699183-1 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| G699L263T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:Microprocessor Reset IC |
| G699L293T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:Microprocessor Reset IC |
| G699L308T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:Microprocessor Reset IC |
| G699L330T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:Microprocessor Reset IC |
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