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参数资料
| 型号： | G923-170T1UF |
| 厂商： | Standard Power |
| 英文描述： | 300mA High PSRR LDO Regulators |
| 中文描述： | 300mA的高PSRR LDO稳压器 |
| 文件页数： | 6/9页 |
| 文件大小： | 388K |
| 代理商： | G923-170T1UF |
Ver: 1.1
Jan 19, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
6
G923
Global Mixed-mode Technology Inc.
Pin Description
PIN
NAME
FUNCTION
1
SHDN
Active-Low Shutdown Input. A logic low reduces the supply current to less than 1A. Connect to IN for normal opera-
tion.
2
GND
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane to maxi-
mize thermal dissipation.
3
IN
Regulator Input. Supply voltage can range from +2.5V to +5.5V. Bypass with 1F to GND
4
OUT
Regulator Output. Fixed or adjustable from 1.25V to +5.5V. Sources up to 300mA. Bypass with a 1F, ＜0.2
Ω
typical ESR capacitor to GND.
5
SET
Feedback Input for Setting the Output Voltage. Connect to GND to set the output voltage to the preset output
voltage. Connect to an external resistor divider for adjustable-output operation.
Detailed Description
The block diagram of the G923 is shown in Figure 1. It
consists of an error amplifier, 1.25V bandgap reference,
PMOS output transistor, internal feedback voltage divider,
mode comparator, shutdown logic, over current protec-
tion circuit, and over temperature protection circuit.
The mode comparator compares the SET pin voltage
with an internal 350mV reference. If the SET pin volt-
age is less than 350mV, the internal feedback voltage
divider’s central tap is connected to the non-inverting
input of the error amplifier. The error amplifier com-
pares non-inverting input with the 1.25V bandgap ref-
erence. If the feedback voltage is higher than 1.25V,
the error amplifier’s output becomes higher so that the
PMOS output transistor has a smaller gate-to-source
voltage (VGS). This reduces the current carrying capa-
bility of the PMOS output transistor, as a result the
output voltage decreases until the feedback voltage is
equal to 1.25V. Similarly, when the feedback voltage is
less than 1.25V, the error amplifier causes the output
PMOS to source more current to pull the feedback
voltage up to 1.25V. Thus, through this feedback ac-
tion, the error amplifier, output PMOS, and the voltage
dividers effectively form a unity-gain amplifier with the
feedback voltage force to be the same as the 1.25V
bandgap reference. The output voltage, VOUT, is then
given by the following equation:
VOUT = 1.25 (1 + R1/R2).
(1)
Alternatively, the relationship between R1 and R2 is
given by:
R1 = R2 (VOUT /1.25 - 1).
(2)
For the reasons of reducing power dissipation and
loop stability, R2 is chosen to be 100K
Ω. For G923-
330, R1 is 164K, and the pre-set VOUT is 3.30V.
When external voltage divider is used, as shown in
Figure 2, the SET pin voltage will be larger than
350mV. The non-inverting input of the amplifier will be
connected to the external voltage divider. However,
the operation of the feedback loop is the same, so that
the conditions of Equations 1 and 2 are still true. The
output voltage is still given by Equation 1.
Figure 1. Functional Diagram
SHDN
IN
OUT
SHUTDOWN
LOGIC
1.25V
Vref
－
ERROR
AMP
＋
OVER CURRENT
PROTECT & DYNAMIC
FEEDBACK
－
＋
－
GND
MODE COMPARATOR
350mV
SET
R1
R2
OVER TEMP.
PROTECT
P
SHDN
IN
OUT
SHUTDOWN
LOGIC
1.25V
Vref
－
ERROR
AMP
＋
OVER CURRENT
PROTECT & DYNAMIC
FEEDBACK
－
＋
－
GND
MODE COMPARATOR
350mV
SET
R1
R2
OVER TEMP.
PROTECT
P
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PDF描述 |
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| G923-170T1U | 300mA High PSRR LDO Regulators |
| G923-180T1UF | 300mA High PSRR LDO Regulators |
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相关代理商/技术参数 |
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| G923-180T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:300mA High PSRR LDO Regulators |
| G923-180T1UF | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:300mA High PSRR LDO Regulators |
| G923-190T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:300mA High PSRR LDO Regulators |
| G923-190T1UF | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:300mA High PSRR LDO Regulators |
| G923-200T1U | 制造商:GMT 制造商全称:Global Mixed-mode Technology Inc 功能描述:300mA High PSRR LDO Regulators |
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