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参数资料
| 型号： | GAL16V8D-7LPN |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 20/26页 |
| 文件大小： | 0K |
| 描述： | IC PLD 8MACRO 5.0V 7.5NS 20PDIP |
| 标准包装： | 18 |
| 系列： | GAL®16V8 |
| 可编程类型： | EE PLD |
| 最大延迟时间 tpd(1)： | 7.5ns |
| 电压电源 - 内部： | 4.75 V ~ 5.25 V |
| 宏单元数： | 8 |
| 工作温度： | 0°C ~ 75°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 20-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 20-PDIP |
| 包装： | 管件 |
GAL16V8
High Performance E2CMOS PLD
Generic Array Logic
1
2
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
4
6
8
9
11
13
14
16
18
1
10
11
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
5
15
PLCC
GAL
16V8
DIP
GAL16V8
Top View
Copyright 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
August 2006
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
16v8_11
Features
HIGH PERFORMANCE E2CMOS TECHNOLOGY
— 3.5 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.0 ns Maximum from Clock Input to Data Output
— UltraMOS Advanced CMOS Technology
50% to 75% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc on Low Power Device
— 45mA Typ Icc on Quarter Power Device
ACTIVE PULL-UPS ON ALL PINS
E2 CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 20-pin PAL Devices with Full
Function/Fuse Map/Parametric Compatibility
PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
ELECTRONIC SIGNATURE FOR IDENTIFICATION
LEAD-FREE PACKAGE OPTIONS
Description
The GAL16V8, at 3.5 ns maximum propagation delay time, com-
bines a high performance CMOS process with Electrically Eras-
able (E2) floating gate technology to provide the highest speed
performance available in the PLD market. High speed erase times
(<100ms) allow the devices to be reprogrammed quickly and ef-
ficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. An important subset of the many architecture configura-
tions possible with the GAL16V8 are the PAL architectures listed
in the table of the macrocell description section. GAL16V8 devices
are capable of emulating any of these PAL architectures with full
function/fuse map/parametric compatibility.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lattice
Semiconductor delivers 100% field programmability and function-
ality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
Functional Block Diagram
Pin Configuration
1
10
11
20
I/CLK
I
GND
Vcc
I/O/Q
I/OE
5
15
SOIC
GAL
16V8
Top
View
Lead-Free
Package
Options
Available!
I/CLK
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
I
I/O/Q
CLK
8
OE
OLMC
PROGRAMMABLE
AND-ARRA
Y
(64
X
32)
I/OE
ALL
DEVICES
DISCONTINUED
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相关代理商/技术参数 |
参数描述 |
|---|---|
| GAL16V8D-7LPNI | 功能描述:SPLD - 简单可编程逻辑器件 16 INPUT 8 OUTPUT 5V LOW POWER 7.5ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| GAL16V8D-7LR/833 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:High Performance E2CMOS PLD Generic Array Logic |
| GAL16V8D-7LR/883 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable PLD |
| GAL16V8D-7LS | 功能描述:SPLD - 简单可编程逻辑器件 16 INPUT 8 OUTPUT 5V LOW POWER 7.5ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| GAL16V8L15W | 制造商:Texas Instruments 功能描述: |
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