参数资料
型号: GLT5160L16I-10TC
厂商: Electronic Theatre Controls, Inc.
英文描述: 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
中文描述: 1,600(2 -银行甲524288字× 16位)同步DRAM
文件页数: 3/45页
文件大小: 399K
代理商: GLT5160L16I-10TC
3
G-LINK Technology
DEC. 2003 (Rev.2.4)
F
UNCTIONAL
D
ESCRIPTION
The GLT5160L16 provides basic functions, bank (row) activate,
burst read / write, bank (row) precharge, and auto / self refresh.
Each command is defined by control signals of RAS, CAS and WE
at CLK rising edge. In addition to 3 signals, CS, CKE and A[10] are
used as chip select, refresh option, and precharge option,
respectively.
To know the detailed definition of commands, please see the com-
mand truth table.
Activate (ACT) [RAS = L, CAS = WE = H]
ACT command activates a row in an idle bank indicated by BA.
Read (READ) [RAS = H, CAS = L, WE = H]
READ command starts burst read from the active bank indicated by
BA. First output data appears after CAS latency. When A[10] = H at
this command, the bank is deactivated after the burst read (auto-pre-
charge, READA).
Write (WRITE) [RAS = H, CAS =WE = L]
WRITE command starts burst write to the active bank indicated by
BA. Total data length to be written is set by burst length. When
A[10] = H at this command, the bank is deactivated after the burst
write (auto-precharge, WRITEA).
Precharge (PRE)
[RAS = L, CAS = H, WE = L]
PRE command deactivates the active bank indicated by BA. This
command also terminates burst read / write operation. When A[10]
= H at this command, both banks are deactivated (precharge all,
PREA).
Auto-Refresh (REFA)
[RAS = CAS = L, WE = CKE = H]
REFA command starts auto-refresh cycle. Refresh address includ-
ing bank address are generated internally. After this command, the
banks are precharged automatically. Any other command should
not be asserted until t
RC
is met.
CLK
CS
RAS
CAS
WE
CKE
A[10]
Chip Select: L=select, h=deselect
Com-
Com-
Com-
Define Basic Com-
Refresh option @refresh command
Precharge Option @ precharge or read/write
command
Command Truth Table
[1]
Command
Mnemonic
CKE n-
1
CKE n
CS
RAS
CAS
WE
BA
A[10
]
A[9:
0]
Deselect
DESEL
H
X
H
X
X
X
X
X
X
No Operation
NOP
H
X
L
H
H
H
X
X
X
Row Address Entry & Bank Activate
ACT
H
X
L
L
H
H
V
V
V
Single Bank Precharge
PRE
H
X
L
L
H
L
V
L
X
Precharge All Banks
PREA
H
X
L
L
H
L
V
H
X
Column Address Entry & Write
WRITE
H
X
L
H
L
L
V
L
V
Column Address Entry & Write with Auto-Precharge
WRITEA
H
X
L
H
L
L
V
H
V
Column Address Entry & Read
READ
H
X
L
H
L
H
V
L
V
Column Address Entry & Read with Auto-Precharge
READA
H
X
L
H
L
H
V
H
V
Auto-Refresh
REFA
H
H
L
L
L
H
X
X
X
Self-Refresh Entry
REFS
H
L
L
L
L
H
X
X
X
Self-Refresh Exit
REFSX
L
H
H
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
Burst Terminate
TBST
H
X
L
H
H
L
X
X
X
Mode Register Set
MRS
H
X
L
L
L
L
X
L
V
1. H = High Level, L = Low Level, V = Valid, X = Don't Care, n = CLK cycle number
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