参数资料
型号: GLT5160L16P-8TC
厂商: Electronic Theatre Controls, Inc.
英文描述: 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
中文描述: 1,600(2 -银行甲524288字× 16位)同步DRAM
文件页数: 18/45页
文件大小: 399K
代理商: GLT5160L16P-8TC
18
G-LINK Technology
DEC. 2003 (Rev. 2.4)
Auto Refresh
Single cycle of auto-refresh is initiated with a REFA (CS = RAS =
CAS = L, WE = CKE = H) command. The refresh address is gener-
ated internally. 4096 REFA cycles within 64 ms refresh 16 Mbit
memory cells. The auto-refresh is performed on each bank alter-
nately (ping-pong refresh). Before performing an auto-refresh, both
banks must be in the idle state. Additional commands must not be
supplied to the device before t
RC
from the REFA command.
Self Refresh
Self-refresh mode is entered by issuing a REFS command (CS =
RAS = CAS = L, WE = H, CKE = L). Once the self-refresh is initi-
ated, it is maintained as long as CKE is kept low. During the self-
refresh mode, CKE is asynchronous and the only enabled input (but
asynchronous), all other inputs including CLK are disabled and
ignored, and power consumption due to synchronous inputs is
saved. To exit the self-refresh, supplying stable CLK inputs, assert-
ing DESEL or NOP command and then asserting CKE (REFSX).
After t
RC
from REFSX both banks are in the idle state and a new
command can be issued after t
RC
, but DESEL or NOP commands
must be asserted till then.
CLK
CS
A[10:0]
Figure 17. Auto Refresh
RAS
CAS
WE
CKE
BA
NOP or Deselect
Minimum t
RC
Auto Refresh on Bank 0
Auto Refresh on Bank 1
minimum t
RC
for recovery
CLK
CS
A[10:0]
Figure 18. Self-Refresh
RAS
CAS
WE
CKE
BA
Stable CLK
Self Refresh Entry
Self Refresh Exit
NOP
new command
X
0
相关PDF资料
PDF描述
GLT5160L16 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
GLT5160L16-10FJ 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
GLT5640AL16 4M X 16 CMOS Synchronous Dynamic RAM
GLT5640AL16-10TC 4M X 16 CMOS Synchronous Dynamic RAM
GLT5640AL16-5.5TC 4M X 16 CMOS Synchronous Dynamic RAM
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