- 您现在的位置：买卖IC网 > PDF目录67672 > GP2010 (Mitel Networks Corporation) GPS Receiver RF Front End PDF资料下载
参数资料
| 型号： | GP2010 |
| 厂商： | Mitel Networks Corporation |
| 英文描述： | GPS Receiver RF Front End |
| 中文描述： | GPS接收机射频前端 |
| 文件页数： | 21/24页 |
| 文件大小： | 151K |
| 代理商： | GP2010 |
GP2010
6
PIN DESCRIPTIONS
All VEE and VCC/VDD pins should be connected to ensure reliable operation
Pin No.
Signal Name
Input/Output
Description
1
IFOutput
Output
IF Test output.
Connected to output of Stage 3 prior to the A to D converter.
A series 1k
resistor is incorporated for buffering purposes.
2
PLL Filt1
Output
PLL Filter 1.
Connected to the bias network within the on-chip VCO. An
external PLL loop filter network should be connected between
this pin and PLL Filt 2 (see below).
3
PLL Filt2
Output
PLL Filter 2.
Connected to the varactor diodes within the on-chip VCO. An
external PLL loop filter network should be connected between
this pin and PLL Filt 1 (see above).
4,6
VEE (OSC)
Input
Negative supply to the on-chip VCO. (See Note 1)
5VCC (OSC)
Input
Positive supply to the on-chip VCO.
7VEE (REG)
Input
Negative supply to the VCO regulator.
This must be connected to GND.
8
PRef
Input
Power-on Reset Reference input.
An on-chip comparator produces a logic HI when the PRef
input voltage exceeds +1.21V. (Nom) (See Page 3).
9
PReset
Output
Power-on Reset Output.
A TTL compatible output controlled by the Power-on reset
comparator (See above). This output remains active even
when the chip is powered down. (See pin 17 - PDn).
10
VEE (IO)
Input
Negative supply to the Digital Interface. (See Note 2)
11
CLK
Input
Sample Clock input from the correlator chip.
A TTL compatible input (which operates at 5.714MHz if used
with GP2021 correlator device) used to clock the MAG & SIGN
output latches, on the rising edge of the CLK signal.
12
MAG
Output
Magnitude bit data output.
A TTL compatible signal, representing the
magnitude of the
mixed down IF signal. Derived from the on-chip 2-bit A to D
converter, synchronised to the CLK input clock signal.
13
SIGN
Output
Sign bit data output.
A TTL compatible signal, representing the
polarity of the mixed
down IF signal. Derived from the on-chip 2-bit A to D converter,
synchronised to the CLK input clock signal.
14
OPClk-
Output
40MHz Clock output - inverse phase.
One side of a balanced differential output clock, with opposite
polarity to Pin 15 - OPClk+. Used to drive a master-clock signal
within the correlator chip.
15
OPClk+
Output
40MHz Clock output - true phase.
Other side of a balanced differential output clock set, with
opposite polarity to Pin 14 - OPClk-. Used to drive a master-
clock signal within the correlator chip.
16
VDD (IO)
Input
Positive supply to the Digital Interface. (See Note 2)
相关PDF资料 |
PDF描述 |
|---|---|
| GP2010 | GPS Receiver RF Front End(用于全球定位系统（GPS）接收器的第二代RF前端) |
| GP2015 | Aluminum Electrolytic Radial Leaded Low Profile Wide Temp Capacitor; Capacitance: 22uF; Voltage: 25V; Case Size: 5x9 mm; Packaging: Bulk |
| GP2015 | GPS Receiver RF Front End(用于全球定位系统（GPS）接收器的第二代RF前端) |
| GP2021 | GPS 12 channel Correlator(用于全球定位系统（GPS）接收器的12通道的C/A代码基带相关器) |
| GP2021 | GPS 12 channel Correlator Advance Information |
相关代理商/技术参数 |
参数描述 |
|---|---|
| GP20-10 | 制造商:FRONTIER 制造商全称:Frontier Electronics. 功能描述:2A GENERAL PURPOSE PLASTIC RECTIFIER |
| GP2010/IG/GP2N | 制造商:Zarlink Semiconductor Inc 功能描述: 制造商:ZARLINK 功能描述: |
| GP2010CGGPBR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Demodulator， Other/Special/Miscellaneous |
| GP20-10G | 制造商:FRONTIER 制造商全称:Frontier Electronics. 功能描述:2A GENERAL PURPOSE GLASS PASSIVATED RECTIFIER |
| GP2010IGGPBR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Demodulator， Other/Special/Miscellaneous |
发布紧急采购，3分钟左右您将得到回复。