参数资料
型号: GS1515
厂商: Electronic Theatre Controls, Inc.
英文描述: HDTV Serial Digital Reclocker
中文描述: 高清晰度电视串行数字时钟恢复器
文件页数: 8/17页
文件大小: 336K
代理商: GS1515
522 - 23 - 01
16
G
S
151
5
OTHER LAYOUT CONSIDERATIONS
The GS1515 is a robust re-timing solution. The layout
should be done such that VCO (GO1515) is close to the
chip minimizing LFA and VCO traces between GS1515 and
GO1515. It is recommended to use the other side of the
PCB board whenever possible. The short trace of LFA will
reduce noise coupling to the control pin of the VCO. The
VCO trace should also be short to reduce EMI radiation
from a 1.5GHz clock source. Digital switching noise from
CMOS chips should be avoided for best performance. This
could be done by providing a moat of at least 50mil wide in
all the planes (the GND, VCC and signal layers) (One should
be able to see through the moat when the PCB is
fabricated). The power supply to the GS1515 Island should
be provided through ferrite beads to reject the power
supply spikes.
In applications where an adaptive equalizer is used with the
GS1515, extra care should be taken to avoid any noise
coupling
between
these
two
devices.
The
following
recommendations should be followed as layout guides
lines. Please refer to the layouts of the EB1515/04 and note
the following:
1. The use of power supply islands for GS1504 Adaptive
Equalizer.
2. The position of ferrite beads for power supply noise
filtering.
3. The ground under the transmission line for GS1504 and
GS1515 interface.
4. The transmission line decoupling at the GS1515 end to
the transmission line ground.
5. The
isolation
moat
around
the
transmission
line
reference ground.
TABLE 3: Application Debugging
PROBLEM
POSSIBLE REASON
SOLUTION
Output Jitter > 80ps
Wrong way of measuring jitter.
Follow jitter measuring procedure as shown in Fig
12.
Bad source / trigger reference signal.
Follow jitter measuring procedure as shown in Fig
12.
Power supply noise generated either by on board
digital circuit or switch mode DC power supply.
Shut down the digital circuit and power the board
from clean voltage regulated supply. The
acceptable noise in the VCC is 5mVp-p. If the
problem is resolved, filter high frequency noise with
ferrite beads and low frequency noise with Inductor
and Capacitor. The source of jitter could also be
found using diagnostic signal DM as mentioned in
the section JITTER DEMODULATION.
Bypass mode activated.
Apply logic high at the BYPASS pin.
Errors being generated
Bad input jitter.
A.
Configure into bypass mode and look for
output jitter under infinite persistence for
about 5 minutes in a sampling scope, if total
jitter including random shots is more than
0.5UI, input jitter is out of specification. Debug
circuit, which is driving GS1515.
B.
Probe IJI by a low frequency digital scope to
capture any glitch. If glitches are not
identified, remove the 10nF PLCAP between
PLCAP and PLCAP. If glitches are identified,
then the sum of jitter of the reclocker and the
source is more than 0.5UI. Achieve reclocker
jitter around 0.1UI or less and reduce the
source jitter less than 0.4UI.
相关PDF资料
PDF描述
GS1515-CQM HDTV Serial Digital Reclocker
GS1515-CTM HDTV Serial Digital Reclocker
GS2008HET/R7 2 A, 800 V, SILICON, RECTIFIER DIODE
GS4576S09L-25 DDR DRAM, PBGA144
GS54180RK 1 ELEMENT, 18 uH, GENERAL PURPOSE INDUCTOR, SMD
相关代理商/技术参数
参数描述
GS1515-CQM 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述:
GS1515-CTM 制造商:GENNUM 制造商全称:GENNUM 功能描述:HDTV Serial Digital Reclocker
GS1522 制造商:GENNUM 制造商全称:GENNUM 功能描述:HDTV Serial Digital Serializer
GS1522_04 制造商:GENNUM 制造商全称:GENNUM 功能描述:HDTV Serial Digital Serializer
GS1522-CQR 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: