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参数资料
| 型号： | GS72116AU-10 |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ACB 19C 19#16 SKT RECP WALL |
| 中文描述： | 128K的× 16异步SRAM的2Mb |
| 文件页数： | 8/18页 |
| 文件大小： | 505K |
| 代理商： | GS72116AU-10 |
Rev: 1.04a 10/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
8/18
2001, Giga Semiconductor, Inc.
GS72116ATP/J/T/U
Read Cycle 2: WE = V
IH
* These parameters are sampled and are not 100% tested.
Write Cycle
Parameter
Symbol
-7
-8
-10
-12
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Write cycle time
tWC
7
—
8
—
10
—
12
—
ns
Address valid to end of write
tAW
5
—
5.5
—
7
—
8
—
ns
Chip enable to end of write
tCW
5
—
5.5
—
7
—
8
—
ns
Byte enable to end of write
tBW
5
—
5.5
—
7
—
8
—
ns
Data set up time
tDW
3.5
—
4
—
5
—
6
—
ns
Data hold time
tDH
0
—
0
—
0
—
0
—
ns
Write pulse width
tWP
5
—
5.5
—
7
—
8
—
ns
Address set up time
tAS
0
—
0
—
0
—
0
—
ns
Write recovery time (WE)
tWR
0
—
0
—
0
—
0
—
ns
Write recovery time (CE)
tWR1
0
—
0
—
0
—
0
—
ns
Output Low Z from end of write
tWLZ
*
3
—
3
—
3
—
3
—
ns
Write to output in High Z
tWHZ
*
—
3
—
3.5
—
4
—
5
ns
tAA
tRC
Address
tAC
tLZ
tAB
tBLZ
tOE
tOLZ
CE
UB, LB
OE
Data Out
tHZ
tBHZ
tOHZ
Data valid
High impedance
相关PDF资料 |
PDF描述 |
|---|---|
| GS72116AU-10I | ACB 19C 19#16 SKT RECP WALL |
| GS72116AU-12 | ACB 19C 19#16 SKT RECP WALL |
| GS72116AU-12I | ACB 9C 9#16 PIN RECP WALL |
| GS72116AU-7 | ACB 9C 9#16 PIN RECP WALL |
| GS72116AU-7I | ACB 9C 9#16 SKT RECP WALL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| GS72116AU-10I | 制造商:GSI Technology 功能描述:SRAM ASYNC SGL 3.3V 2MBIT 128KX16 10NS 48FBGA - Trays |
| GS72116AU-12 | 制造商:GSI Technology 功能描述:SRAM ASYNC SGL 3.3V 2MBIT 128KX16 12NS 48FBGA - Trays |
| GS72116AU-12I | 制造商:GSI Technology 功能描述:SRAM ASYNC SGL 3.3V 2MBIT 128KX16 12NS 48FBGA - Trays |
| GS72116AU-7 | 制造商:GSI Technology 功能描述:SRAM ASYNC SGL 3.3V 2MBIT 128KX16 7NS 48FBGA - Trays |
| GS72116AU-7I | 制造商:GSI Technology 功能描述:SRAM ASYNC SGL 3.3V 2MBIT 128KX16 7NS 48FBGA - Trays |
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