参数资料
型号: GS74108TP-15
厂商: Electronic Theatre Controls, Inc.
英文描述: 512K x 8 4Mb Asynchronous SRAM
中文描述: 为512k × 8 4Mb的异步SRAM
文件页数: 6/12页
文件大小: 241K
代理商: GS74108TP-15
Rev: 1.06 7/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
6/12
1999, Giga Semiconductor, Inc.
GS74108TP/J
AC Characteristics
* These parameters are sampled and are not 100% tested
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
Read Cycle
Parameter
Symbol
-8
-10
-12
-15
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Read cycle time
t
RC
8
---
10
---
12
---
15
---
ns
Address access time
t
AA
---
8
---
10
---
12
---
15
ns
Chip enable access time (CE)
t
AC
---
8
---
10
---
12
---
15
ns
Output enable to output valid (OE)
t
OE
---
3.5
---
4
---
5
---
6
ns
Output hold from address change
t
OH
3
---
3
---
3
---
3
---
ns
Chip enable to output in low Z (CE)
t
LZ
*
3
---
3
---
3
---
3
---
ns
Output enable to output in low Z (OE)
t
OLZ
*
0
---
0
---
0
---
0
---
ns
Chip disable to output in High Z (CE)
t
HZ
*
---
4
---
5
---
6
---
7
ns
Output disable to output in High Z (OE)
t
OHZ
*
---
3.5
---
4
---
5
---
6
ns
t
AA
t
OH
t
RC
Address
Data Out
Previous Data
Data valid
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