参数资料
型号: GS8161Z32BGD-200V
厂商: GSI TECHNOLOGY
元件分类: DRAM
英文描述: 18Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 512K X 32 ZBT SRAM, 6.5 ns, PBGA165
封装: 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件页数: 4/35页
文件大小: 790K
代理商: GS8161Z32BGD-200V
100-Pin TQFP Pin Descriptions
Symbol
Type
Description
A
0
, A
1
In
Burst Address Inputs; Preload the burst counter
A
In
Address Inputs
CK
In
Clock Input Signal
B
A
In
Byte Write signal for data inputs DQ
A1
–DQ
A9
; active low
B
B
In
Byte Write signal for data inputs DQ
B1
–DQ
B9
; active low
B
C
In
Byte Write signal for data inputs DQ
C1
–DQ
C9
; active low
B
D
In
Byte Write signal for data inputs DQ
D1
–DQ
D9
; active low
W
In
Write Enable; active low
E
1
In
Chip Enable; active low
E
2
In
Chip Enable—Active High. For self decoded depth expansion
E
3
In
Chip Enable—Active Low. For self decoded depth expansion
G
In
Output Enable; active low
ADV
In
Advance/Load; Burst address counter control pin
CKE
In
Clock Input Buffer Enable; active low
NC
No Connect
DQ
A
I/O
Byte A Data Input and Output pins
DQ
B
I/O
Byte B Data Input and Output pins
DQ
C
I/O
Byte C Data Input and Output pins
DQ
D
I/O
Byte D Data Input and Output pins
ZZ
In
Power down control; active high
FT
In
Pipeline/Flow Through Mode Control; active low
LBO
In
Linear Burst Order; active low.
V
DD
In
Core power supply
V
SS
In
Ground
V
DDQ
In
Output driver power supply
GS8161ZxxB(T/D)-xxxV
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01a 6/2006
4/35
2004, GSI Technology
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