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参数资料
| 型号： | HCPL-2400#300 |
| 元件分类： | 光电耦合器 |
| 英文描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40 Mbps |
| 封装： | 0.300 INCH, DIP-8 |
| 文件页数： | 14/14页 |
| 文件大小： | 285K |
| 代理商： | HCPL-2400#300 |
1-308
Package Characteristics
Parameter
Sym.
Device
Min.
Typ.*
Max.
Units
Test Conditions
Fig.
Note
Input-Output
VISO
2500
V rms
RH
≤ 50%,
3, 13
Momentary
t = 1 min.,
Withstand Voltage**
TA = 25°C
Input-Output
RI-O
1012
VI-O = 500 Vdc
3
Resistance
Input-Output
CI-O
0.6
pF
f = 1 MHz
Capacitance
VI-O = 0 Vdc
Input-Input
II-I
2430
0.005
A
RH
≤ 45%
8
Insulation Leakage
t = 5 s,
Current
VI-I = 500 Vdc
Resistance
RI-I
2430
1011
VI-I = 500 Vdc
8
(Input-Input)
Capacitance
CI-I
2430
0.25
pF
f = 1 MHz
8
(Input-Input)
*All typical values are at TA = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if
applicable), your equipment level safety specification or HP Application Note 1074 entitled “Optocoupler Input-Output Endurance
Voltage,” publication number 5963-2203E.
Notes:
1. Each channel.
2. Duration of output short circuit time
not to exceed 10 ms.
3. Device considered a two terminal
device: pins 1, 2, 3, and 4 shorted
together, and pins 5, 6, 7, and 8
shorted together.
4. tPHL propagation delay is measured
from the 50% level on the rising edge
of the input current pulse to the 1.5 V
level on the falling edge of the output
pulse. The t
PLH propagation delay is
measured from the 50% level on the
falling edge of the input current pulse
to the 1.5 V level on the rising edge of
the output pulse.
5. The typical data shown is indicative of
what can be expected using the
application circuit in Figure 13.
6. This specification simulates the worst
case operating conditions of the
HCPL-2400 over the recommended
operating temperature and V
CC range
with the suggested application circuit
of Figure 13.
7. Propagation delay skew is discussed
later in this data sheet.
8. Measured between pins 1 and 2
shorted together, and pins 3 and 4
shorted together.
9. Common mode transient immunity in a
Logic High level is the maximum
tolerable (positive) dV
CM/dt of the
common mode pulse, VCM, to assure
that the output will remain in a Logic
High state (i.e., V
O > 2.0 V. Common
mode transient immunity in a Logic
Low level is the maximum tolerable
(negative) dV
CM/dt of the common
mode pulse, VCM, to assure that the
output will remain in a Logic Low state
(i.e., V
O < 0.8 V).
10. Power Supply Noise Immunity is the
peak to peak amplitude of the ac ripple
voltage on the VCC line that the device
will withstand and still remain in the
desired logic state. For desired logic
high state, VOH(MIN) > 2.0 V, and for
desired logic low state,
V
OL(MAX) < 0.8 V.
11. Use of a 0.1
F bypass capacitor
connected between pins 8 and 5
adjacent to the device is required.
12. Peak Forward Input Current pulse
width < 50
s at 1 KHz maximum
repetition rate.
13. In accordance with UL 1577, each
optocoupler is proof tested by applying
an insulation test voltage
≥ 3000 V rms
for one second (leakage detection
current limit, I
I-O ≤ 5 A). This test is
performed before the 100% Produc-
tion test shown in the VDE 0884
Insulation Related Characteristics
Table, if applicable.
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