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参数资料
| 型号： | HCPL-3700 |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 光电耦合器 |
| 英文描述： | AC/DC TO LOGIC INTERFACE OPTOCOUPLER |
| 中文描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER |
| 封装： | DIP-8 |
| 文件页数： | 9/13页 |
| 文件大小： | 119K |
| 代理商： | HCPL-3700 |
9
Notes:
1. Measured at a point 1.6 mm below seating plane.
2. Current into/out of any single lead.
3. Surge input current duration is 3 ms at 120 Hz pulse repetition rate. Transient input current duration is 10
μ
s at 120 Hz pulse
repetition rate. Note that maximum input power, P
IN
, must be observed.
4. Derate linearly above 70
°
C free-air temperature at a rate of 4.1 mW/
°
C (HCPL-3700/3760) and 3.1 mW/
°
C (HCPL-0370). Maximum
input power dissipation of 230 mW (HCPL-3700/3760) and 172 mW (HCPL-0370) allows an input IC junction temperature of 125
°
C
at an ambient temperature of T
A
= 70
°
C. Excessive P
IN
and T
J
may result in IC chip degradation.
5. Derate linearly above 70
°
C free-air temperature at a rate of 5.4 mW/
°
C (HCPL-3700/3760) and 5 mW/
°
C (HCPL-0370).
6. Derate linearly above 70
°
C free-air temperature at a rate of 3.9 mW/
°
C (HCPL-3700/3760) and 1.9 mW/
°
C (HCPL-0370). Maximum
output power dissipation of 210 mW (HCPL-3700/3760) and 103 mW (HCPL-0370) allows an output IC junction temperature of
125
°
C at an ambient temperature of T
A
= 70
°
C.
7. Derate linearly above 70
°
C free-air temperature at a rate of 0.6 mA/
°
C.
8. Maximum operating frequency is defined when output waveform Pin 6 obtains only 90% of V
CC
with R
L
= 4.7 k
, C
L
= 30 pF using
a 5 V square wave input signal.
9. All typical values are at T
= 25
°
C, V
= 5.0 V unless otherwise stated.
10. The t
propagation delay is measured from the 2.5 V level of the leading edge of a 5.0 V input pulse (1
μ
s rise time) to the 1.5 V
level on the leading edge of the output pulse (see Figure 10).
11. The t
propagation delay is measured from the 2.5 V level of the trailing edge of a 5.0 V input pulse (1
μ
s fall time) to the 1.5 V
level on the trailing edge of the output pulse (see Figure 10).
12. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dV
/dt on the leading edge of the
common mode pulse, V
, to insure that the output will remain in a Logic High state (i.e., V
> 2.0 V). Common mode transient
immunity in Logic Low level is the maximum tolerable (negative) dV
CM
/dt on the trailing edge of the common mode pulse signal,
V
, to insure that the output will remain in a Logic Low state (i.e., V
< 0.8 V). See Figure 11.
13. In applications where dV
/dt may exceed 50,000 V/
μ
s (such as static discharge), a series resistor, R
CC
, should be included to
protect the detector IC from destructively high surge currents. The recommended value for R
CC
is 240
per volt of allowable drop
in V
(between Pin 8 and V
) with a minimum value of 240
.
14. Logic low output level at Pin 6 occurs under the conditions of V
≥
V
TH+
as well as the range of V
> V
TH–
once V
has exceeded
V
. Logic high output level at Pin 6 occurs under the conditions of V
IN
≤
V
TH-
as well as the range of V
IN
< V
TH+
once V
IN
has
decreased below V
.
15. AC voltage is instantaneous voltage.
16. Device considered a two terminal device: Pins 1, 2, 3, 4 connected together, and Pins 5, 6, 7, 8 connected together.
17. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
≥
4500 V rms for 1 second
(leakage detection current limit, I
≤
5
μ
A).
18. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
≥
6000 V rms for 1 second
(leakage detection current limit, I
≤
5
μ
A). This test is performed before the 100% production test for partial discharge (Method b)
shown in the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table.
Figure 1. Typical Input
Characteristics, I
vs. V
IN
(AC Voltage
is Instantaneous Value).
INPUT
DEVICE
TH
+
2.5 mA 1.3 mA
1.2 mA 0.6 mA
3.7 V
4.9 V
TH
–
CONNNECTION
PINS 2, 3
OR 1, 4
PINS 2, 3
PINS 1, 4
I
TH
HCPL-0370/3700
HCPL-3760
ALL
ALL
V
TH(dc)
V
TH(ac)
2.6 V
3.7 V
Figure 2. Typical Transfer Characteristics.
相关PDF资料 |
PDF描述 |
|---|---|
| HCPL-3700S | AC/DC TO LOGIC INTERFACE OPTOCOUPLER |
| HCPL-3700SD | AC/DC TO LOGIC INTERFACE OPTOCOUPLER |
| HCPL-3700W | AC/DC TO LOGIC INTERFACE OPTOCOUPLER |
| HCPL-0708 | High Speed CMOS Optocoupler |
| HCPL-0708500 | High Speed CMOS Optocoupler |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HCPL-3700#010 | 制造商:Hewlett Packard Co 功能描述: |
| HCPL-3700#300 | 功能描述:逻辑输出光电耦合器 AC/DC to Logic RoHS:否 制造商:Fairchild Semiconductor 绝缘电压:4243 Vrms 输出类型:Push-Pull 最大传播延迟时间:500 ns 最大正向二极管电压: 最大反向二极管电压: 最大正向二极管电流: 最大连续输出电流:2.5 A 最大功率耗散:100 mW 最大工作温度:+ 100 C 最小工作温度:- 40 C 封装 / 箱体:SO-16 封装:Tube |
| HCPL-3700#500 | 功能描述:逻辑输出光电耦合器 AC/DC to Logic RoHS:否 制造商:Fairchild Semiconductor 绝缘电压:4243 Vrms 输出类型:Push-Pull 最大传播延迟时间:500 ns 最大正向二极管电压: 最大反向二极管电压: 最大正向二极管电流: 最大连续输出电流:2.5 A 最大功率耗散:100 mW 最大工作温度:+ 100 C 最小工作温度:- 40 C 封装 / 箱体:SO-16 封装:Tube |
| HCPL-3700 | 制造商:Fairchild Semiconductor Corporation 功能描述:Optocoupler |
| HCPL-3700.SD | 制造商:Fairchild Semiconductor Corporation 功能描述:TAPE REEL / AC/DC HI-SPEED LOGIC, SURFACE MOUNT LEAD BEND, T&R |
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