Rev. 1.0, 03/99, page 93 of 209
d. The R2 port in the H4344/H4889 and the R8 port in the H4318/H4359/H4369 are 4-bit I/O
ports. Both R2 and R8 are capable of 4-bit input using the LAR and LBR commands, and
4-bit output using the LRA and LRB commands. The output data is stored in the PDR of
the respective pins.
In this example task, the R2
0
to R2
3
pins in the H4344/H4889 Series and the R8
0
to R8
3
pins
in the H4318/H4359/H4369 Series are set for output and used to output pulses to the
stepping motor.
Table 3 describes the functions of the R2 port in the H4344/H4889 and the R8 port in the
H4318/H4359/H4369.
Table 3
R2 Port Functions in H4344/H4889 and R8 Port Functions in
H4318/H4359/H4369
Data Control Register R2 (DCR2)
Note: Applies to H4344/H4889 Series
Function
DCR2 switches the I/O pin function of the R2 port. When any bit of DCR2 is cleared
to “0”, the output buffer (CMOS) of the corresponding pin is turned OFF and the
output is set to high impedance. When the respective bit of DCR2 is set to “1”, the
output buffer of the corresponding pin is set ON and the corresponding PDR value is
output.
Data Control Register R8 (DCR8)
Note: Applies to H4318/H4359/H4369 Series
Function
DCR8 switches the I/O pin function of the R8 port. When any bit of DCR8 is cleared
to “0”, the output buffer (CMOS) of the corresponding pin is turned OFF and the
output is set to high impedance. When the respective bit of DCR8 is set to “1”, the
output buffer of the corresponding pin is set ON and the corresponding PDR value is
output.
Port Mode Register 3 (PMR3)
Note: Applies to H4889 Series
Function
PMR3 is a 4-bit write-only register. Bits PMR33 to PMR30 switch the functions of the
R2 port’s dual-function pins.
Port Data Register (PDR)
Function
The I/O pins of the R ports have built-in PDRs to store the output data. When the LRA
and LRB commands are executed, the contents of the accumulator (A) and B register
(B) are transferred to the PDR of the specified R port. When the corresponding bit of
the DCR of the R port is “1”, the output buffer of the appropriate pin is set ON and the
value in the PDR is output via that pin. The PDR is initialized to $F at a reset.