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参数资料
| 型号： | HFA1130 |
| 厂商： | Intersil Corporation |
| 英文描述： | 850MHz, Output Limiting, Low Distortion Current Feedback Operational Amplifier(850MHz、输出额定、低失真电流反馈运算放大器) |
| 中文描述： | 是850MHz，输出限制，低失真，电流反馈运算放大器（是850MHz，输出额定，低失真电流反馈运算放大器） |
| 文件页数： | 4/12页 |
| 文件大小： | 378K |
| 代理商： | HFA1130 |
4
FN3369.4
July 15, 2005
Application Information
Optimum Feedback Resistor (R
F
)
The enclosed plots of inverting and non-inverting frequency
response detail the performance of the HFA1130 in various
gains. Although the bandwidth dependency on A
CL
isn’t as
severe as that of a voltage feedback amplifier, there is an
appreciable decrease in bandwidth at higher gains. This
decrease can be minimized by taking advantage of the current
feedback amplifier’s unique relationship between bandwidth
and R
F
. All current feedback amplifiers require a feedback
resistor, even for unity gain applications, and the R
F
, in
conjunction with the internal compensation capacitor, sets the
dominant pole of the frequency response. Thus, the
amplifier’s bandwidth is inversely proportional to R
F
. The
HFA1130 design is optimized for a 510
R
F
, at a gain of +1.
Decreasing R
F
in a unity gain application decreases stability,
resulting in excessive peaking and overshoot (Note:
Capacitive feedback causes the same problems due to the
feedback impedance decrease at higher frequencies). At
higher gains the amplifier is more stable, so R
F
can be
decreased in a trade-off of stability for bandwidth. The table
below lists recommended R
F
values for various gains, and the
expected bandwidth.
Clamp Operation
General
The HFA1130 features user programmable output clamps to
limit output voltage excursions. Clamping action is obtained
by applying voltages to the V
H
and V
L
terminals (pins 8 and
5) of the amplifier. V
H
sets the upper output limit, while V
L
sets the lower clamp level. If the amplifier tries to drive the
output above V
H
, or below V
L
, the clamp circuitry limits the
output voltage at V
H
or V
L
(
±
the clamp accuracy),
respectively. The low input bias currents of the clamp pins
allow them to be driven by simple resistive divider circuits, or
active elements such as amplifiers or DACs.
Clamp Circuitry
Figure 1 shows a simplified schematic of the HFA1130 input
stage, and the high clamp (V
H
) circuitry. As with all current
feedback amplifiers, there is a unity gain buffer (Q
X1
- Q
X2
)
between the positive and negative inputs. This buffer forces -IN
to track +IN, and sets up a slewing current of (V
-IN
- V
OUT
)/R
F
.
This current is mirrored onto the high impedance node (Z) by
Q
X3
-Q
X4
, where it is converted to a voltage and fed to the output
via another unity gain buffer. If no clamping is utilized, the high
impedance node may swing within the limits defined by Q
P4
and
Q
N4
. Note that when the output reaches it’s quiescent value, the
current flowing through -IN is reduced to only that small current
(-I
BIAS
) required to keep the output at the final voltage.
Tracing the path from V
H
to Z illustrates the effect of the
clamp voltage on the high impedance node. V
H
decreases
by 2V
BE
(Q
N6
and Q
P6
) to set up the base voltage on Q
P5
.
Q
P5
begins to conduct whenever the high impedance node
Negative Clamp Range
B
25
-
-5.0 to +2.0
-
V
Positive Clamp Range
B
25
-
-2.0 to +5.0
-
V
Clamp Input Bias Current
A
25
-
50
200
μ
A
Clamp Input Bandwidth
V
H
or V
L
= 100mV
P-P
B
25
-
500
-
MHz
NOTES:
2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
3. See Typical Performance Curves for more information.
Electrical Specifications
V
SUPPLY
=
±
5V, A
V
= +1, R
F
= 510
, R
L
= 100
, Unless Otherwise Specified
(Continued)
PARAMETER
TEST
CONDITIONS
(NOTE 2)
TEST
LEVEL
TEMP.
(°C)
MIN
TYP
MAX
UNITS
A
CL
+1
R
F
(
)
510
BW (MHz)
850
-1
430
580
+2
360
670
+5
150
520
+10
180
240
+19
270
125
+1
+IN
V-
V+
Q
P1
Q
N1
V-
Q
N3
Q
P3
Q
P4
Q
N2
Q
P2
Q
N4
Q
P5
Q
N5
Z
V+
-IN
V
OUT
I
CLAMP
R
F
(EXTERNAL)
Q
P6
Q
N6
V
H
R
1
50K
(30K
FOR V
L
)
200
FIGURE 1. HFA1130 SIMPLIFIED V
H
CLAMP CIRCUITRY
HFA1130
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