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参数资料
| 型号： | HFA1305IB |
| 厂商： | INTERSIL CORP |
| 元件分类： | 音频／视频放大 |
| 英文描述： | Circular Connector; No. of Contacts:55; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:22; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:22-55 |
| 中文描述： | VIDEO AMPLIFIER, PDSO14 |
| 封装： | PLASTIC, SOIC-14 |
| 文件页数： | 5/12页 |
| 文件大小： | 143K |
| 代理商： | HFA1305IB |
5
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth
dependency on closed loop gain isn’t as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and R
F
.
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and R
F
, in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R
F
. The HFA1305 design is
optimized for R
F
= 510
(SOIC) at a gain of +2. Decreasing
R
F
decreases stability, resulting in excessive peaking and
overshoot (Note: Capacitive feedback causes the same
problems due to the feedback impedance decrease at higher
frequencies). However, at higher gains the amplifier is more
stable so R
F
can be decreased in a trade-off of stability for
bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth. For good
channel-to-channel gain matching, it is recommended that
all resistors (termination as well as gain setting) be
±
1%
tolerance or better.
Non-Inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
≥
50
. This is especially
important in inverting gain configurations where the
non-inverting input would normally be connected directly to
GND.
Pulse Undershoot
The HFA1305 utilizes a quasi-complementary output stage
to achieve high output current while minimizing quiescent
supply current. In this approach, a composite device
replaces the traditional PNP pulldown transistor. The
composite device switches modes after crossing 0V,
resulting in added distortion for signals swinging below
ground, and an increased undershoot on the negative
portion of the output waveform (see Figure 6 and Figure 9).
This undershoot isn’t present for small bipolar signals, or
large positive signals (see Figures 4, 7, 10 and Figures 5, 8).
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board.
The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
μ
F) tantalum in parallel with a small value
(0.1
μ
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance, parasitic or
planned, connected to the output must be minimized, or
isolated as discussed in the next section.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and eventual instability. To reduce this
capacitance the designer should remove the ground plane
under traces connected to -IN, and keep connections to -IN
as short as possible.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 3.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 560MHz. By decreasing R
S
as C
L
increases (as illustrated
in the curve), the maximum bandwidth is obtained without
sacrificing stability. In spite of this, bandwidth still decreases
as the load capacitance increases.
TABLE 1. OPTIMUM FEEDBACK RESISTOR
GAIN
(A
CL
)
R
F
(
)
SOIC
BANDWIDTH (MHz)
SOIC
-1
360
420
+1
464 (+R
S
= 649)
375
+2
510
560
+5
200
330
+10
180
140
HFA1305
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