参数资料
型号: HFA3101BZ
厂商: Intersil
文件页数: 2/12页
文件大小: 0K
描述: IC TRANSISTOR ARRAY UHF 8-SOIC
标准包装: 98
频率: 0Hz ~ 10GHz
混频器数目: 1
噪音数据: 1.7dB
包装: 管件
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
产品目录页面: 1246 (CN2011-ZH PDF)
HFA3101
Absolute Maximum Ratings
Thermal Information
V CEO , Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . 8.0V
Thermal Resistance (Typical, Note 1)
θ JA ( o C/W)
V CBO , Collector to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . 12.0V
V EBO , Emitter to Base Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
I C , Collector Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 o C to 85 o C
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . .175 o C
Maximum Junction Temperature (Plastic Package) . . . . . . . . .150 o C
Maximum Storage Temperature Range . . . . . . . . . . -65 o C to 150 o C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 o C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T A = 25 o C
(NOTE 2)
TEST
PARAMETER
TEST CONDITIONS
LEVEL
MIN
TYP
MAX
UNITS
Collector to Base Breakdown Voltage, V (BR)CBO , Q 1 thru Q 6 I C = 100 μ A, I E = 0
A
12
18
-
V
Collector to Emitter Breakdown Voltage, V (BR)CEO ,
I C = 100 μ A, I B = 0
A
8
12
-
V
Q 5 and Q 6
Emitter to Base Breakdown Voltage, V (BR)EBO , Q 1 thru Q 6
Collector Cutoff Current, I CBO , Q 1 thru Q 4
Emitter Cutoff Current, I EBO , Q 5 and Q 6
DC Current Gain, h FE , Q 1 thru Q 6
I E = 10 μ A, I C = 0
V CB = 8V, I E = 0
V EB = 1V, I C = 0
I C = 10mA, V CE = 3V
A
A
A
A
5.5
-
-
40
6
0.1
-
70
-
10
200
-
V
nA
nA
Collector to Base Capacitance, C CB
Q 1 thru Q 4
V CB = 5V, f = 1MHz
C
-
0.300
-
pF
Q 5 and Q 6
-
0.600
-
pF
Emitter to Base Capacitance, C EB
Q 1 thru Q 4
V EB = 0, f = 1MHz
B
-
0.200
-
pF
Q 5 and Q 6
-
0.400
-
pF
Current Gain-Bandwidth Product, f T
Power Gain-Bandwidth Product, f MAX
Q 1 thru Q 4
Q 5 and Q 6
Q 1 thru Q 4
Q 5 and Q 6
I C = 10mA, V CE = 5V
I C = 20mA, V CE = 5V
I C = 10mA, V CE = 5V
I C = 20mA, V CE = 5V
C
C
C
C
-
-
-
-
10
10
5
5
-
-
-
-
GHz
GHz
GHz
GHz
Available Gain at Minimum Noise Figure, G NFMIN ,
Q 5 and Q 6
Minimum Noise Figure, NF MIN , Q 5 and Q 6
50 ? Noise Figure, NF 50 ? , Q 5 and Q 6
I C = 5mA,
V CE = 3V
I C = 5mA,
V CE = 3V
I C = 5mA,
V CE = 3V
f = 0.5GHz
f = 1.0GHz
f = 0.5GHz
f = 1.0GHz
f = 0.5GHz
f = 1.0GHz
C
C
C
C
C
C
-
-
-
-
-
-
17.5
11.9
1.7
2.0
2.25
2.5
-
-
-
-
-
-
dB
dB
dB
dB
dB
dB
DC Current Gain Matching, h FE1 /h FE2 , Q 1 and Q 2 ,
I C = 10mA, V CE = 3V
A
0.9
1.0
1.1
Q 3 and Q 4 , and Q 5 and Q 6
Input Offset Voltage, V OS , (Q 1 and Q 2 ), (Q 3 and Q 4 ),
I C = 10mA, V CE = 3V
A
-
1.5
5
mV
(Q 5 and Q 6 )
Input Offset Current, I C , (Q 1 and Q 2 ), (Q 3 and Q 4 ),
I C = 10mA, V CE = 3V
A
-
5
25
μ A
(Q 5 and Q 6 )
Input Offset Voltage TC, dV OS /dT, (Q1 and Q2, Q3 and Q 4 ,
I C = 10mA, V CE = 3V
C
-
0.5
-
μ V/ o C
Q 5 and Q 6 )
Collector to Collector Leakage, I TRENCH-LEAKAGE
? V TEST = 5V
B
-
0.01
-
nA
NOTE:
2. Test Level: A. Production Tested, B. Typical or Guaranteed Limit Based on Characterization, C. Design Typical for Information Only.
2
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