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参数资料
| 型号： | HI-565A |
| 厂商： | Intersil Corporation |
| 英文描述： | 64 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 高速，单片的D / A转换器与参考 |
| 文件页数： | 7/9页 |
| 文件大小： | 303K |
| 代理商： | HI-565A |
7
Other Considerations
Grounds
The Hl-565A has two ground terminals, pin 5 (REF GND)
and pin 12 (PWR GND). These should not be tied together
near the package unless that point is also the system signal
ground to which all returns are connected. (If such a point
exists, then separate paths are required to pins 5 and 12).
The current through pin 5 is near-zero DC (Note 1); but pin
12 carries up to 1.75mA of code-dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
Layout
Connections to pin 9 (I
OUT
) on the Hl-565A are most critical
for high speed performance. Output capacitance of the DAC
is only 20pF, so a small change or additional capacitance
may alter the op amp’s stability and affect settling time.
Connections to pin 9 should be short and few. Component
leads should be short on the side connecting to pin 9 (as for
feedback capacitor C). See the Settling Time section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve the
HI-565A also. If no op amp is used, a 0.01
μ
F ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
Current Cancellation
Current cancellation is a two step process within the
HI-565A in which code dependent variations are eliminated,
then the resulting DC current is supplied internally. First an
auxiliary 9-bit R-2R ladder is driven by the complement of
the DACs input code. Together, the main and auxiliary
ladders draw a continuous 2.25mA from the internal ground
node, regardless of input code. Part of this DC current is
supplied by the zener voltage reference, and the remainder
is sourced from the positive supply via a current mirror which
is laser trimmed for zero current through the external
terminal (pin 5).
FIGURE 3A.
FIGURE 3B.
OUT
PULSE
GENERATOR
NO. 1
PULSE
GENERATOR
NO. 2
20V
±
20%
BIAS
TURN ON
TURN OFF
HI-565A
24
23
14
13
8
11
10
9
5
5K
5K
2.5K
9.95K
2mA
LSB
12
10
0.1
μ
F
200K
SCHOTTKY
DIODES
STROBE
IN (D)
COMP
OUT
+5V
DVM
OUT
SYNC
TRIG
OUT
90
~100kHz
(A)
(B)
(C)
IN
NC
P
V
LSB
SUPPLY
DIGITAL
INPUT
DAC
OUTPUT
COMP.
STROBE
EQUAL
BRIGHTNESS
COMP.
OUT
SETTLING TIME
t
D
= COMPARATOR DELAY
50%
-0.5 LSB
+3V
0V
0V
-400mV
2V
0.8V
4V
0V
t
X
50%
(B)
(TURN
OFF)
(A)
(C)
(D)
HI-565A
相关PDF资料 |
PDF描述 |
|---|---|
| HI1-565AJD-5 | High Speed, Monolithic D/A Converter with Reference |
| HI1-565AKD-5 | High Speed, Monolithic D/A Converter with Reference |
| HI-574 | Complete, 12-Bit A/D Converters with Microprocessor Interface |
| HI3-574AKN-5 | JT 16C 16#16 PIN GRND PLUG |
| HI3-674AKN-5 | Circular Connector; No. of Contacts:16; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:20; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:20-16 RoHS Compliant: No |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HI-565A/883 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:High Speed. Monolithic D/A Converter with Reference |
| HI-565A_02 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Speed, Monolithic D/A Converter with Reference |
| HI5660 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:8-Bit, 165/125/60MSPS, High Speed D/A Converter |
| HI5660/16IA | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:8-Bit, 165/125/60MSPS, High Speed D/A Converter |
| HI5660/16IB | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:8-Bit, 165/125/60MSPS, High Speed D/A Converter |
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