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参数资料
| 型号： | HI1-0518-5 |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | 运动控制电子 |
| 英文描述： | 8-Channel/Differential 4-Channel,CMOS high speed andlog multiplexer |
| 中文描述： | 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP18 |
| 文件页数： | 3/8页 |
| 文件大小： | 170K |
| 代理商： | HI1-0518-5 |
3
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 2)
. . . .θ
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
CERDIP Package. . . . . . . . . . . . . . . . .
Maximum Junction Temperature
Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
o
C
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V
Analog (V
IN
, V
OUT
) . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (V
DD
/LLS Pin = GND or Open)
V
A0-1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
V
A2/SDS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (V
DD
/LLS Pin = V
DD
)
V
A0-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Operating Conditions
Temperature Ranges
HI-518-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
HI-518-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
θ
JC
(
o
C/W)
N/A
18
90
70
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; V
AH
(Logic Level High) = 2.4V, V
AL
(Logic Level Low) = 0.8V; V
DD
/LLS = GND
(Note 3), Unless Otherwise Specified
PARAMETER
TEST
CONDITIONS
TEMP
(
o
C)
-8
-5
TYP
UNITS
MIN
TYP
MAX
MIN
MAX
DYNAMIC CHARACTERISTICS
Access Time, t
A
25
Full
25
25
25
25
25
25
25
25
25
25
25
-
-
130
-
20
120
140
250
800
-
-
-
-
-
0.02
175
225
-
175
175
-
-
25
-
5
10
5
-
-
-
130
-
20
120
140
250
800
-
-
-
-
-
0.02
175
225
-
175
175
-
-
25
-
5
10
5
-
ns
ns
ns
ns
ns
ns
ns
mV
dB
pF
pF
pF
pF
Break-Before-Make Delay, t
OPEN
Enable Delay (ON), t
ON(EN)
Enable Delay (OFF), t
OFF(EN)
Settling Time
10
-
-
-
-
-
45
-
-
-
-
10
To 0.1%
To 0.01%
Note 6
Note 7
-
-
-
Charge Injection Error
Off Isolation
Channel Input Capacitance, C
S(OFF)
Channel Output Capacitance, C
D(OFF)
Digital Input Capacitance, C
A
Input to Output Capacitance, C
DS(OFF)
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, V
AL
(TTL)
Input High Threshold, V
AH
(TTL)
Input Low Threshold, V
AL
(CMOS)
Input High Threshold, V
AH
(CMOS)
Input Leakage Current, I
AH
(High)
Input Leakage Current, I
AL
(Low)
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, V
IN
On Resistance, r
ON
45
-
-
-
-
Note 3
Note 3
Note 3
Note 3
Full
Full
Full
Full
Full
Full
-
-
-
-
-
-
-
0.8
-
-
-
-
-
-
-
-
0.8
-
V
V
V
V
μ
A
μ
A
2.4
-
2.4
-
0.3V
DD
-
1
20
0.3V
DD
-
1
20
0.7V
DD
-
-
0.7V
DD
-
-
Note 4
Note 5
Full
25
Full
25
Full
25
Full
25
Full
-14
-
-
-
-
-
-
-
-
-
+14
750
1,000
-
50
-
50
-
50
-15
-
-
-
-
-
-
-
-
-
+15
750
1,000
-
50
-
50
-
50
V
nA
nA
nA
nA
nA
nA
480
-
0.01
-
0.015
-
0.015
-
480
-
0.01
-
0.015
-
0.015
-
Off Input Leakage Current, l
S(OFF)
Off Output Leakage Current, I
D(OFF)
On Channel Leakage Current, I
D(ON)
POWER SUPPLY CHARACTERISTICS
Power Dissipation, P
D
Full
-
-
450
-
-
540
mW
HI-518
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