参数资料
型号: HI1-565ASD-2
厂商: INTERSIL CORP
元件分类: DAC
英文描述: High Speed, Monolithic D/A Converter with Reference
中文描述: PARALLEL, WORD INPUT LOADING, 0.5 us SETTLING TIME, 12-BIT DAC, CDIP24
封装: METAL SEALED, SIDE BRAZED, CERAMIC, DIP-24
文件页数: 1/9页
文件大小: 303K
代理商: HI1-565ASD-2
1
File Number
3109.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
HI-565A
High Speed, Monolithic D/A Converter
with Reference
The HI-565A is a fast, 12-bit, current output, digital-to-analog
converter. The monolithic chip includes a precision voltage
reference, thin-film R2R ladder, reference control amplifier
and twelve high speed bipolar current switches.
The Intersil dielectric isolation process provides latch free
operation while minimizing stray capacitance and leakage
currents, to produce an excellent combination of speed and
accuracy. Also, ground currents are minimized to produce a
low and constant current through the ground terminal, which
reduces error due to code dependent ground currents.
HI-565A dice are laser trimmed for a maximum integral
nonlinearity error of
±
0.5 LSB at 25
o
C. In addition, the low
noise buried zener reference is trimmed both for absolute
value and temperature coefficient. Power dissipation is
typically 250mW, with
±
15V supplies.
The HI-565A is offered in both commercial and military
grades. See Ordering Information.
Features
12-Bit DAC and Reference on a Single Chip
Pin Compatible With AD565A
Very High Speed: Settles to
±
0.5 LSB in 250ns (Max)
Full Scale Switching Time 30ns (Typ)
Guaranteed For Operation With
±
12V Supplies
Monotonicity Guaranteed Over Temperature
Nonlinearity Guaranteed Over Temp (Max) . . . .
±
0.5 LSB
Low Gain Drift (Max, DAC Plus Ref) . . . . . . . . .25ppm/
o
C
Low Power Dissipation . . . . . . . . . . . . . . . . . . . . .250mW
Applications
CRT Displays
High Speed A/D Converters
Signal Reconstruction
Waveform Synthesis
Ordering Information
PART NUMBER
LINEARITY (INL)
LINEARITY (DNL)
TEMP. RANGE (
o
C)
PACKAGE
PKG. NO.
HI1-565AJD-5
0.50 LSB
0.75 LSB
0 to 75
24 Ld SBDIP
D24.6
HI1-565AKD-5
0.25 LSB
0.50 LSB
0 to 75
24 Ld SBDIP
D24.6
HI1-565ASD-2
0.50 LSB
0.75 LSB
-55 to 125
24 Ld SBDIP
D24.6
HI1-565ATD-2
0.25 LSB
0.50 LSB
-55 to 125
24 Ld SBDIP
D24.6
HI1-565ASD/883
0.50 LSB
0.50 LSB
-55 to 125
24 Ld SBDIP
D24.6
HI1-565ATD/883
0.25 LSB
0.50 LSB
-55 to 125
24 Ld SBDIP
D24.6
Pinout
HI-565A (SBDIP)
TOP VIEW
Functional Diagram
1
2
3
4
5
6
7
8
9
10
11
12
NC
NC
V
CC
REF OUT (+10V)
REF GND
REF IN
-V
EE
BIPOLAR R IN
IDAC OUT
10V SPAN R
20V SPAN R
POWER GND
16
17
18
19
20
21
22
23
24
15
14
13
BIT 1 (MSB) IN
BIT 3 IN
BIT 4 IN
BIT 5 IN
BIT 6 IN
BIT 8 IN
BIT 10 IN
BIT 11 IN
BIT 12 (LSB) IN
BIT 2 IN
BIT 7 IN
BIT 9 IN
REF
OUT
V
CC
4
3
+
-
6
IN
19.95K
5
REF
GND
3.5K
3K
I
REF
0.5mA
7
12
-V
EE
PWR
GND
MSB
LSB
HI-565A
24 . . .
. . .13
BIP. OFF
8
9.95K
DAC
I
O
(4X I
REF
X CODE)
1120V
SPAN
10V
SPAN
OUT
10
9
2.5K
5K
5K
+
-
Data Sheet
June 1999
相关PDF资料
PDF描述
HI-565A 64 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN
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HI-574 Complete, 12-Bit A/D Converters with Microprocessor Interface
HI3-574AKN-5 JT 16C 16#16 PIN GRND PLUG
相关代理商/技术参数
参数描述
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