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参数资料
| 型号： | HI2570JCQ |
| 厂商： | INTERSIL CORP |
| 元件分类： | 模拟信号调理 |
| 英文描述： | 1-Bit AD/DA Converter For Audio Application |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封装： | PLASTIC, MQFP-48 |
| 文件页数： | 3/8页 |
| 文件大小： | 637K |
| 代理商： | HI2570JCQ |
3
Pin Descriptions
PIN NO.
SYMBOL
I/O
DESCRIPTION
1
AV
DD
3
—
Analog power supply for channel-1 DA converter
2
AOUT1 (-)
O
Analog reversed phase output of channel-1 DA converter
3
AV
SS
3
—
Analog GND for channel-1 DA converter
4
UCLK
O
Outputs a 1/2 frequency divider of clock input from oscillation pin XTLI (Pin 7).
User clock output for the externally connected ICs.
5
XCLK
O
256Fs/512Fs clock output. This provides the master clock for ICs operating in
the slave mode when multiple CXD2570Qs are connected.
6
XV
DD
—
Digital power supply for the master clock
7
XTLI
I
Crystal oscillation circuit input. Connects the crystal oscillator selected by the
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36). To input an external mas-
ter clock, this pin is used.
8
XTLO
O
Crystal oscillation circuit output. Connects the crystal oscillator selected by the
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36).
9
XV
SS
—
Digital GND for the master clock
10
AV
SS
4
—
Analog GND for channel-2 DA converter
11
AOUT2 (-)
O
Analog reversed phase output of channel-2 DA converter
12
AV
DD
4
—
Analog power supply for channel-2 DA converter
13
AOUT2 (+)
O
Analog forward phase output of channel-2 DA converter
14
AV
SS
4
—
Analog GND for channel-2 DA converter
15
AV
SS
2
—
Analog GND for channel-2 AD converter
16
AIN1
I
Analog input of channel-2 converter
17
AV
DD
2
—
Analog power supply for channel-2 AD converter
18
NC
—
19
SUB
—
Connected to the substrate in the IC (having the same potential as power sup-
ply). Connect this pin to GND via a capacitor on the external printed wiring
board.
20
NC
—
21
DV
SS
—
Digital GND
22
XMCK2
O
IC measurement. Normally, Low is output.
23
TEST
I
Test. Normally, fixed at Low. Equipped with a pull-down resistor.
24
CLR
I
System clear input. Normally, fixed at High; cleared at Low. Equipped with a
pull-up resistor.
25
DV
DD
—
Digital power supply.
26
MS
I
Master/slave mode switching input. High = Master mode. Low = Slave mode.
Equipped with a pull-up resistor.
27
LRCK
I/O
Sampling frequency clock pin of serial I/O. Outputs in master mode (when Pin
26 is High). Inputs in slave mode (when Pin 26 is Low). Transfers channel-1
data at High; transfers channel-2 data at Low.
HI2570, CXD2570
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