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参数资料
| 型号： | HI3-574AKN-5 |
| 厂商： | INTERSIL CORP |
| 元件分类： | ADC |
| 英文描述： | JT 16C 16#16 PIN GRND PLUG |
| 中文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28 |
| 封装： | PLASTIC, MS-011AB, DIP-28 |
| 文件页数： | 12/18页 |
| 文件大小： | 200K |
| 代理商： | HI3-574AKN-5 |
6-963
HI-774
The device driving the HI-774 analog input will see a nominal
load of 5k
(10V range) or 10k
(20V range). However, the
other end of these input resistors may change as much as
±
400mV with each bit decision. These input disturbances
are caused by the internal DAC changing codes which
causes a glitch on the summing junction. This creates abrupt
changes in current at the analog input causing a “kick back”
glitch from the input. Because the algorithm starts with the
MSB, the first glitches will be the largest and get smaller as
the conversion proceeds. These glitches can occur at 350ns
intervals so an op amp with a low output impedance and fast
settling is desirable. Ultimately the input must settle to within
the window of Figure 1 at the bit decision points in order to
achieve 12-bit accuracy.
The HI-774 differs from the most high-speed successive
approximation type ADC’s in that it does not require a high
performance buffer or sample and hold. With error correction
the input can settle while the conversion is underway, but
only during the first 4.8
μ
s. The input must be within 10.76%
of the final value when the MSB decision is made. This
occurs approximately 650ns after the conversion has been
initiated. Digital error correction also loosens the bandwidth
requirements of the buffer or sample and hold. As long as
the input “kick back” disturbances settle within the window of
Figure 1 the device will remain accurate. The combined
effect of settling and the “kick back” disturbances must
remain in the Figure 1 window.
If the design is being optimized for speed, the input device
should have closed loop bandwidth to 3MHz, and a low out-
put impedance (calculated by dividing the open loop output
resistance by the open loop gain). If the application requires
a high speed sample and hold the Intersil HA-5330 or
HA-5320 are recommended.
In any design the input (pin 13 or 14) should be checked
during a conversion to make sure that the input stays within
the correctable window of Figure 1.
Digital Error Correction
HI-774
The HI-774 features the smart successive approximation
register (SSAR) which includes digital error correction. This
has the advantage of allowing the initial input to vary within a
+31 to -32 LSB window about the final value. The input can
move during the first 4.8
μ
s, after which it must remain stable
within
±
1
/
2
LSB. With this feature a conversion can start
before the input has settled completely; however, it must be
within the window as described in Figure 1.
The conversion cycle starts by making the first 8-bit decisions
very quickly, allowing the internal DAC to settle only to 8-bit
accuracy. Then the converter goes through two error correc-
tion cycles. At this point the input must be stable within
±
1
/
2
LSB. These cycles correct the 8-bit word to 12-bit accuracy for
any errors made (up to +16 or -32 LSBs). This is up one count
or down two counts at 8-bit resolution. The converter then
continues to make the 4 LSB decisions, settling out to 12-bit
accuracy. The last four bits can adjust the code in the positive
direction by up to 15 LSBs. This results in a total correction
range of +31 to -32 LSBs. When an 8-bit conversion is per-
formed, the input must settle to within
±
1
/
2
LSB at 8-bit resolu-
tion (which equals
±
8 LSBs at 12-bit resolution).
With the HI-774 a conversion can be initiated before the
input has completely settled, as long as it meets the con-
straints of the Figure 1 window. This allows the user to start
conversion up to 4.8
μ
s earlier than with a typical analog to
digital converter. A typical successive approximation type
ADC must have a constant input during a conversion
because once a bit decision is made it is locked in and can-
not change.
FIGURE 1. HI-774 ERROR CORRECTION WINDOW vs TIME
When driving the 20V (pin 14) input, minimize capacitance on pin 13.
FIGURE 2. UNIPOLAR CONNECTIONS
32
16
8
0
-8
-16
-31
A
(
BIT DECISION POINTS
8-BIT CONVERSION
±
1
/
2
LSB
~
4.8
μ
s
LAST BIT
DECISION
(12-BIT)
END OF
CONVERSION
(12 BIT)
MSB BIT DECISION
~
650ns
12-BIT CONVERSION
1
2
3
4
5
6
7
8
CONVERSION
INITIATED
TIME (
μ
s)
10 REF IN
8
REF OUT
12 BIP OFF
13 10V
IN
14 20V
IN
€
9 ANA
COM
16-19
LOW BITS
20-23
MIDDLE BITS
24-27
HIGH BITS
STS 28
2 12/8
3
CS
4
A
O
5
R/C
6
CE
+5V
1
+15V
7
-15V 11
DIG COM 15
-15V
OFFSET
R1
100K
+15V
GAIN
R2
100
100K
100
0V TO +10V
ANALOG
INPUTS
0V TO +20V
HI-574A, HI-674A, HI-774
相关PDF资料 |
PDF描述 |
|---|---|
| HI3-674AKN-5 | Circular Connector; No. of Contacts:16; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:20; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:20-16 RoHS Compliant: No |
| HI1-574ATD-2 | Complete, 12-Bit A/D Converters with Microprocessor Interface |
| HI1-674ATD-2 | Complete, 12-Bit A/D Converters with Microprocessor Interface |
| HI1-574AUD-2 | Complete, 12-Bit A/D Converters with Microprocessor Interface |
| HI1-674AUD-2 | Complete, 12-Bit A/D Converters with Microprocessor Interface |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HI3-574AKN-5Z | 功能描述:模数转换器 - ADC W/ANNEAL ADC 12BIT 5 0KSPS COM RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| HI3-574ALN-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
| HI-3582 | 制造商:HOLTIC 制造商全称:Holt Integrated Circuits 功能描述:3.3V ARINC 429 TERMINAL IC |
| HI-3582_13 | 制造商:HOLTIC 制造商全称:Holt Integrated Circuits 功能描述:ARINC 429 3.3V Terminal IC |
| HI-3582A | 制造商:HOLTIC 制造商全称:Holt Integrated Circuits 功能描述:ARINC 429 3.3V Terminal IC with High-Speed Interface |
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