参数资料
型号: HI5728INZ-T
厂商: Intersil
文件页数: 16/19页
文件大小: 0K
描述: IC DAC 10BIT PAR 250M 48LQFP
标准包装: 1,000
设置时间: 35ns
位数: 10
数据接口: 并联
转换器数目: 2
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
输出数目和类型: *
采样率(每秒): 125M
6
FN4321.5
January 22, 2010
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP) . . . . . . . . . DVDD +0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . .
±50A
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AVDD +0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Thermal Resistance (Typical, Note 1)
θJA(°C/W)
48 Ld TQFP Package. . . . . . . . . . . . . . . . . . . . . . . .
55
Maximum Power Dissipation
48 Ld TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 930mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1.
θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
AVDD = DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = +25°C for All Typical Values. Data given is
PARAMETER
TEST CONDITIONS
HI5728IN
TA = -40°C TO +85°C
UNITS
MIN
(Note 11)
TYP
MAX
(Note 11)
SYSTEM PERFORMANCE (Per Channel)
Resolution
10
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-1
±0.5
+1
LSB
Differential Linearity Error, DNL
(Note 7)
-0.5
±0.25
+0.5
LSB
Offset Error, IOS
(Note 7)
-0.025
+0.025
% FSR
Offset Drift Coefficient
(Note 7)
-
0.1
-
ppm FSR/°C
Full Scale Gain Error, FSE
With External Reference (Notes 2, 7)
-10
±2+10
% FSR
With Internal Reference (Notes 2, 7)
-10
±1+10
% FSR
Full Scale Gain Drift
With External Reference (Note 7)
-
±50
-
ppm FSR/°C
With Internal Reference (Note 7)
-
±100
-
ppm FSR/°C
Gain Matching Between Channels
-0.5
0.1
0.5
dB
I/Q Channel Isolation
FOUT = 10MHz
-
80
-
dB
Output Voltage Compliance Range
(Note 3)
-0.3
-
1.25
V
Full Scale Output Current, IFS
2-
20
mA
DYNAMIC CHARACTERISTICS (Per Channel)
Maximum Clock Rate, fCLK
(Note 3)
125
-
MHz
Output Settling Time, (tSETT)
0.1% (
±1 LSB, equivalent to 9 Bits) (Note 7)
-
20
-
ns
0.05% (
±1/2 LSB, equivalent to 10 Bits) (Note 7)
-
35
-
ns
Singlet Glitch Area (Peak Glitch)
RL = 25Ω (Note 7)
-
35
-
pVs
Output Rise Time
Full Scale Step
-
1.5
-
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√Hz
IOUTFS = 2mA
-
30
-
pA/
√Hz
HI5728
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