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参数资料
| 型号： | HI5731BIP |
| 厂商： | Intersil |
| 文件页数： | 2/17页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT 100MSPS HS 28-PDIP |
| 标准包装： | 13 |
| 设置时间： | 20ns |
| 位数： | 12 |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 电压电源： | 模拟和数字，双 ± |
| 功率耗散（最大）： | 650mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-DIP（0.600"，15.24mm） |
| 供应商设备封装： | 28-PDIP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电流，单极 |
| 采样率（每秒）： | 100M |
10
HI5731 as possible on the analog (AVEE) and digital (DVEE)
supplies. The analog and digital ground returns should be
connected together back at the device to ensure proper
operation on power up. The VCC power pin should also be
decoupled with a 0.1
F capacitor.
Reference
The internal reference of the HI5731 is a -1.23V (typical)
bandgap voltage reference with 175
V/oC of temperature
drift (typical). The internal reference is connected to the
Control Amplifier which in turn drives the segmented current
cells. Reference Out (REF OUT) is internally connected to
the Control Amplifier. The Control Amplifier Output (CTRL
OUT) should be used to drive the Control Amplifier Input
(CTRL IN) and a 0.1
F capacitor to analog VEE. This
improves settling time by providing an AC ground at the
current source base node. The Full Scale Output Current is
controlled by the REF OUT pin and the set resistor (RSET).
The ratio is:
IOUT (Full Scale) = (VREF OUT/RSET) x 16,
The internal reference (REF OUT) can be overdriven with a
more precise external reference to provide better
performance over temperature. Figure 22 illustrates a typical
external reference configuration.
Multiplying Capability
The HI5731 can operate in two different multiplying
configurations. For frequencies from DC to 100kHz, a signal
of up to 0.6VP-P can be applied directly to the REF OUT pin
as shown in Figure 23.
The signal must have a DC value such that the peak
negative voltage equals -1.25V. Alternately, a capacitor can
be placed in series with REF OUT if DC multiplying is not
required. The lower input bandwidth can be calculated using
the following formula:
For multiplying frequencies above 100kHz, the CTRL IN pin
can be driven directly as seen in Figure 24.
The nominal input/output relationship is defined as:
In order to prevent the full scale output current from
exceeding 20.48mA, the RSET resistor must be adjusted
according to the following equation:
The circuit in Figure 24 can be tuned to adjust the lower
cutoff frequency by adjusting capacitor values. Table 1 below
illustrates the relationship.
Also, the input signal must be limited to 1VP-P to avoid
distortion in the DAC output current caused by excessive
modulation of the internal current sources.
Outputs
The outputs IOUT and IOUT are complementary current
outputs. Current is steered to either IOUT or IOUT in
proportion to the digital input code. The sum of the two
currents is always equal to the full scale current minus one
LSB. The current output can be converted to a voltage by
using a load resistor. Both current outputs should have the
same load resistor (64
typically). By using a 64 load on
the output, a 50
effective output resistance (R
OUT) is
achieved due to the 227
(±15%) parallel resistance seen
looking back into the output. This is the nominal value of the
R2R ladder of the DAC. The 50
output is needed for
matching the output with a 50
line. The load resistor should
FIGURE 22. EXTERNAL REFERENCE CONFIGURATION
(26) REF OUT
HI5731
R
-5.2V
-1.25V
FIGURE 23. LOW FREQUENCY MULTIPLYING BANDWIDTH
CIRCUIT
REF OUT
HI5731
CIN (OPTIONAL)
0.01
F
RSET
VIN
CTRL OUT
CTRL IN
AVEE
TABLE 1. CAPACITOR SELECTION
fIN
C1
C2
100kHz
0.01
F1F
>1MHz
0.001
F0.1F
C
IN
1
2
π
() 1400
() f
IN
()
------------------------------------------- .
=
FIGURE 24. HIGH FREQUENCY MULTIPLYING BANDWIDTH
CIRCUIT
HI5731
CTRL IN
VIN
CTRL OUT
AVEE
200
C2
C1
50
I
OUT
V
IN
80
-------------- .
=
R
SET
16V
REF
I
OUT(FULL SCALE)
V
IN PEAK
()
80
-----------------------------
–
----------------------------------------------------------------------------------------------- .
=
HI5731
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