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| 型号： | HI7190EVAL |
| 厂商： | Intersil |
| 文件页数： | 3/11页 |
| 文件大小： | 0K |
| 描述： | EVALUATION PLATFORM HI7190 |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 200k |
| 数据接口： | 串行 |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 15mW @ 200kSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | HI7190 |
| 已供物品： | 板 |
Application Note 9505
can be used without degradation in performance. Smaller
values of V REF can also be used but performance will be
degraded since the system noise becomes larger relative to
the LSB size.
The jumper JP2 controls whether the V RHI pin of the HI7190
is connected to an external reference, which connects to the
V REF SMA pad, or to the on board reference which is preset
to 2.5V. If JP2 is in the far right position V RHI is connected to
the on board low noise reference and when JP2 is in the far
left position V RHI is connected to the external reference. If an
external reference is used it is recommended that a twisted
pair wire be used and soldered directly to the SMA pad on
the evaluation board. The potentiometer R1 can be used to
vary the on board reference voltage. Please note that the
speci?cations for the HI7190 are tested with V RHI set to
2.5V. V RHI must always be greater than V RLO for proper
operation of the device.
Analog Inputs
The analog input on the HI7190 is a fully differential input with
programmable gain capabilities. The input accepts both uni-
polar and bipolar input signals and gains range from 1 to 128.
The user must pay careful attention to the input driver and/or
input ?lter circuitry as the input sampling rate (or modulator
clock rate) varies with the selected PGIA gain, and the input
impedance is dependent upon the modulator clock rate.
Please refer to the data sheet for more information.
The analog inputs come onto the board via the SMA pads
labeled AIN+ and AIN-. Once again it is recommended that
twisted pair wire be used to drive the positive and negative
analog inputs.
Common Mode Input
The jumper JP1 is provided to allow the V CM pin to be tied to
either analog ground (upper position), or V RHI (lower posi-
tion). The input voltage for V CM should always be set at the
midpoint between AV DD and AV SS . So if AV DD = +5V and
J1 must be removed from the board when using an external
clocking source and the external clocking source must be
disconnected from the board when using either of the on
board clocking methods. When J1 is in the right most posi-
tion the 10MHz crystal oscillator is selected and when J1 is
in the left most position the combination 10MHz crystal and
on chip oscillator clocking method is selected. The external
clock can be used from a minimum frequency of 1MHz up to
a maximum frequency of 10MHz.
For the best noise performance the crystal should be
removed from the board when using the crystal oscillator
and vice versa. Both the crystal and crystal oscillator should
be removed when using an external clock.
Digital Inputs/Outputs
The digital input and output pins of the HI7190 are interfaced
through line drivers and receivers to the 25 pin D connector at
the right edge of the board. These pins are activated and deac-
tivated by the evaluation software which controls the functional-
ity of the HI7190. Please refer the HI7190 data sheet for a
detailed description of the functionality of these pins.
U5 on the evaluation board is an “open socket” which is
used in conjunction with the test modes of the HI7190 for
Intersil internal testing and evaluation.
Software Description
The software provided with the HI7190 evaluation kit allows
the user to operate the device in many of the various modes
the part supports. The software is menu driven for ease of
use. The simpli?ed ?ow diagram shown in Figure 1 gives a
good feel for the structure of the software. Every menu
allows access to all other menus.
MAIN MENU
AV SS = -5V, V CM should be at analog ground. Please note
the HI7190 is speci?ed for AV DD = +5V and AV SS = -5V oper-
READ
MENU
CHANGE MODE
MENU
WRITE
MENU
ation only.
RESET
EXIT
Clock Input
DUT
PROGRAM
The master clock into the HI7190 can be supplied by either a
crystal connected between the OSC 1 and OSC 2 pins or a
CMOS compatible clock signal connected to the OSC 1 pin.
The input sampling frequency, modulator clock frequency, ?l-
ter -3dB frequency, output update rate, and calibration times
are all directly related to the master clock frequency, f OSC .
For example, if a 1MHz clock is used instead of a 10MHz
FIGURE 1. SIMPLIFIED SOFTWARE FLOW CHART
The Main Menu appears after invoking the HI7190 evalua-
tion software. This menu is the gateway to other menus that
allow the user to communicate with the HI7190.
Main Menu:
clock, what is normally a 10Hz conversion rate becomes a
1Hz conversion rate. Lowering the clock frequency will also
lower the power supply currents. Please note that the
s
c
Reset DUT
Change Mode Menu
HI7190 speci?cations are written for a 10MHz clock only.
w Write Menu
The HI7190 evaluation board allows for the HI7190 master
clock to be supplied externally, generated by the on board
crystal oscillator, or generated by an on board crystal used in
conjunction with the on chip oscillator circuitry. The jumper
3
r
x
Read Menu
Exit
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