参数资料
型号: HIP1011ACBZA-T
厂商: Intersil
文件页数: 8/11页
文件大小: 0K
描述: IC CTRLR HOT PLUG PCI 16-SOIC
标准包装: 2,500
类型: 热交换控制器
应用: 通用型 CompactPCI?
内部开关:
电源电压: 10.8 V ~ 13.2 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
HIP1011A
HIP1011A PCI Hot Plug Controller
Key Feature Description and Operation
A drop-in alternative to the widely used HIP1011, the
HIP1011A additionally features an adjustable delay time to
fault reporting and latch-off of the MOSFET switches. During
an over current condition (OC) on any output, or an under
(indicating a fault has occurred) and the start of the gate
drive outputs latching off. The latch-off is initiated by the
falling FLTN signal reaching the output latch threshold
voltage, V FLTN, TH . Table 1 illustrates the effect of the FLTN
capacitor on the response time.
TABLE 1. RESPONSE TIME TABLE
voltage (UV) condition on the +5V, +3.3V or +12V outputs, a
0.001 μ F
0.1 μ F
10 μ F
LOW (0V) is presented on the FLTN output and all
3V5VG Response a
0.85 μ s
37 μ s
3.8ms
MOSFETs are latched-off. A programmable delay time from
an OC or UV event to the FLTN signal going LOW and
MOSFET latch-off can be designed into the system by a
single capacitor from the FLTN pin to ground. The addition of
an increasingly larger capacitor value on the FLTN pin
increases the time from the OC or UV occurrence to the start
of the FLTN high to low transition. The capacitor also slows
the falling ramp thus delaying reaching the FLTN latch
threshold of ~2.4V. Once the FLTN latch voltage threshold is
reached the HIP1011A then simultaneously shuts down all
four supplies. This added feature enables the HIP1011A to
ignore both transient UV and OC events to the extent of a
a
V FLTN, TH
FLTN
single capacitor value in the system design. This feature also
may allow the system OS to complete housekeeping
activities in preparation for a possible unplanned shutdown
T1
T2
3V5VG
of the affected card by receiving an early warning signal from
the HIP1011A.
Customizing and Optimizing Circuit Performance
and Functionality
HOW ADJUSTABLE IS THE FAULT REPORTING DELAY
AND TIME TO POWER SUPPLY LATCH-OFF?
Figure 12 illustrates the relationship between the FLTN
signal and the gate drive outputs. Duration a , indicates the
time between FLTN starting to transition from High to Low,
FIGURE 12. TIMING DIAGRAM
CAN THE HIP1011A BE USED ON A CompactPCI
BOARD?
Yes, the HIP1011A can be used on a CompactPCI card
application. See Technical Brief TB358.
3.3V
7.6A OUT
12V
0.5A OUT
-12V
0.1A OUT
5V
5A OUT
3.3V INPUT
-12V INPUT
5m ? 1%
HIP1011A
M12VIN
M12VO
FLTN
M12VG
12VG
3V5VG
0.033 μ F
5m ? 1%
5V INPUT
0.033 μ F
12V INPUT
V CC
12VIN
3VISEN
3VS
OCSET
GND
12VO
5VISEN
5VS
PWRON
0.033 μ F
6.04k ?
1%
POWER CONTROL INPUT
(SEE TABLE 1)
NOTE:
3. All capacitors are ± ± 10%.
8
FAULT OUTPUT (ACTIVE LOW)
FIGURE 11. HIP1011A TYPICAL APPLICATION
FN4631.5
November 16, 2004
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