参数资料
型号: HIP6004EVAL1
厂商: Intersil
文件页数: 2/7页
文件大小: 0K
描述: EVALUATION BOARD HIP6004
标准包装: 1
主要目的: 特殊用途 DC/DC,VRM 电源
输出及类型: 1,非隔离
输出电压: 1.3 V ~ 3.5 V
电流 - 输出: 14A
输入电压: 5 ~ 12 V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: HIP6004
Application Note 9672
Efficiency
Figure 3 shows the measured evaluation board efficiency
versus load current for four different conditions. The data
was taken at room temperature with 100 linear feet per
minute (LFM) of airflow.
95
90
It does spread the main switch power losses across three
devices so it does have some thermal advantages. Similar
results can be expected for the comparison of two versus
three lower MOSFETs when Vin = 12V.
Thermal Performance
The thermal performance of the VRM is shown in Figure 5.
This data is with the following conditions applied:
1. V IN = 5V and V OUT = 2.8V.
2. 100 linear feet per minute (LFM) airflow parallel to the
85
80
75
70
V IN = 5V, V OUT = 2.8V
V IN = 5V, V OUT = 2.0V
V IN = 12V, V OUT = 2.8V
V IN = 12V, V OUT = 2.0V
plane of the pc board.
3. Ambient temperature = 22 o C.
Thermal considerations were a major influence on the
design of the HIP6004EVAL1. The use of surface-mount
SO-8 MOSFETs means that the pc board traces are also the
heat sink. This causes a temperature rise ( Δ T) to the pc
board, as evidenced in Figure 5. A four-layer board is used
to help keep the temperature gradients from exceeding
65
2 4 6 8 10 12
LOAD CURRENT (A)
FIGURE 3. EFFICIENCY vs LOAD FOR HIP6004EVAL1
95
90
14
desirable limits. At a 14A load, the pc board Δ T is only about
20 o C (measured near the MOSFETs) and the HIP6004
junction temperature is about 67 o C.
70
HIP6004 JUNCTION
60
85
80
75
2 UPPER MOSFETs
3 UPPER MOSFETs
50
40
30
Q5 (LOWER) JUNCTION
Q1 (UPPER) JUNCTION
PC BOARD
70
65
2
4
6 8
10
12
14
20
2
4
6 8
LOAD CURRENT (A)
10
12
14
LOAD CURRENT (A)
FIGURE 4. COMPARISON OF HIP6004EVAL1 EFFICIENCY
WITH 2 UPPER MOSFETs AND 3 UPPER MOSFETs
The HIP6004EVAL1 uses four Intersil RF1K49157 (30V,
30m Ω ) MOSFETs, two in parallel for both the main (upper)
and synchronous (lower) switches. The board was layed out
with provisions for three upper and four lower MOSFETs to
allow for greater flexibility in meeting a variety of
requirements. However, Figure 3 shows that the VRM
provides high efficiency for four different input and output
voltage combinations with only two upper and two lower
MOSFETs.
Figure 4 compares the efficiency of the HIP6004EVAL1,
both with and without an additional upper MOSFET (Q3)
populated at Vin = 5V and Vout = 2.8V. This figure shows
that a third upper MOSFET has minimal impact on efficiency.
2
FIGURE 5. THERMAL PERFORMANCE vs LOAD FOR
HIP6004EVAL1
Transient Response
Figures 6 and 7 show laboratory oscillograms of the
HIP6004EVAL1 in response to a load transient application.
The load transient applied was from 0A to 14A. As Figure 6
shows, the output voltage of the VRM (V OUT ) remains well
within the ± 5% regulation window. There is sufficient
headroom to allow for worst-case component tolerances
(mainly in the equivalent series resistance (ESR) of the
output capacitors) and temperature effects. Figure 7 details
the positive edge of the load transient application. The
bottom trace is the output inductor current (I L ).
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