参数资料
型号: HIP6012CBZ
厂商: Intersil
文件页数: 5/12页
文件大小: 0K
描述: IC CTRLR PWM BUCK SYNC 14-SOIC
标准包装: 50
应用: 控制器,Intel Pentium? Pro、PowerP、Alpha
输入电压: 5V,12V
输出数: 1
输出电压: 1.3 V ~ 12 V
工作温度: 0°C ~ 70°C
安装类型: *
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
供应商设备封装: *
包装: 管件
产品目录页面: 1242 (CN2011-ZH PDF)
HIP6012
PGND (Pin 11)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 12)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
PVCC (Pin 13)
Provide a bias supply for the lower gate drive to this pin.
SOFT-START
(1V/DIV.)
OUTPUT
VOLTAGE
VCC (Pin 14)
Provide a 12V bias supply for the chip to this pin.
0V
0V
(1V/DIV.)
Functional Description
t1
t2
t3
TIME (5ms/DIV.)
Initialization
The HIP6012 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input
voltage (V IN ) on the OCSET pin. The level on OCSET is
equal to V IN Less a fixed voltage drop (see overcurrent
protection). With the EN pin held to V CC , the POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V IN and V CC are equivalent and the
+12V power source must exceed the rising V CC threshold
before POR initiates operation.
The Power-On Reset (POR) function inhibits operation with
the chip disabled (EN pin low). With both input supplies
above their POR thresholds, transitioning the EN pin high
initiates a soft start interval.
Soft Start
The POR function initiates the soft start sequence. An
internal 10 μ A current source charges an external capacitor
(C SS ) on the SS pin to 4V. Soft start clamps the error
amplifier output (COMP pin) and reference input (+ terminal
of error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with C SS = 0.1 μ F. Initially the clamp on the
error amplifier (COMP pin) controls the converter’s output
voltage. At t1 in Figure 3, the SS voltage reaches the valley
of the oscillator’s triangle wave. The oscillator’s triangular
waveform is compared to the ramping error amplifier
voltage. This generates PHASE pulses of increasing width
that charge the output capacitor(s). This interval of
increasing pulse width continues to t2. With sufficient
output voltage, the clamp on the reference input controls
the output voltage. This is the interval between t2 and t3 in
Figure 3. At t3 the SS voltage exceeds the reference
voltage and the output voltage is in regulation. This method
provides a rapid and controlled output voltage rise.
5
FIGURE 3. SOFT-START INTERVAL
4V
2V
0V
15A
10A
5A
0A
TIME (20ms/DIV.)
FIGURE 4. OVERCURRENT OPERATION
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
r DS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R OCSET )
programs the overcurrent trip level. An internal 200 μ A
(typical) current sink develops a voltage across R OCSET that
is reference to V IN . When the voltage across the upper
MOSFET (also referenced to V IN ) exceeds the voltage
across R OCSET , the overcurrent function initiates a soft-start
sequence. The soft-start function discharges C SS with a
10 μ A current sink and inhibits PWM operation. The soft-start
function recharges C SS , and PWM operation resumes with
the error amplifier clamped to the SS voltage. Should an
overload occur while recharging C SS , the soft start function
inhibits PWM operation while fully charging C SS to 4V to
FN4324.2
December 27, 2004
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