参数资料
型号: HIP6301VCB
厂商: INTERSIL CORP
元件分类: 稳压器
英文描述: Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO20
封装: PLASTIC, MS-013AC, SOIC-20
文件页数: 9/20页
文件大小: 518K
代理商: HIP6301VCB
9
FN9034.2
December 27, 2004
information used for this control is the voltage that is
developed across r
DS(ON)
of the lower MOSFETs, Q2 and
Q4, when they are conducting. A single resistor converts and
scales the voltage across the MOSFETs to a current that is
applied to the current sensing circuit within the controller.
Output from these sensing circuits is applied to the current
averaging circuit. Each PWM channel receives the difference
signal from the summing circuit that compares the average
sensed current to the individual channel current. When a
power channel’s current is greater than the average current,
the signal applied via the summing correction circuit to the
comparator, reduces the output pulse width of the
comparator to compensate for the detected “above average”
current in that channel.
Droop Compensation
In addition to control of each power channel’s output current,
the average channel current is also used to provide CORE
voltage droop compensation. Average full channel current is
defined as 50
μ
A. By selecting an input resistor, R
IN
, the
amount of voltage droop required at full load current can be
programmed. The average current driven into the FB pin
results in a voltage increase across resistor R
IN
that is in the
direction to make the error amplifier “see” a higher voltage at
the inverting input, resulting in the Error Amplifier adjusting
the output voltage lower. The voltage developed across R
IN
is equal to the “droop” voltage. See the
Current Sensing and
Balancing
section for more details.
Applications and Convertor Start-Up
Each PWM power channel’s current is regulated. This
enables the PWM channels to accurately share the load
current for enhanced reliability. The HIP6601, HIP6602 or
HIP6603 MOSFET driver interfaces with the HIP6301V. For
more information, see the datasheets for the individual
Intersil MOSFET drivers.
The HIP6301V is capable of controlling up to 4 PWM power
channels. Connecting unused PWM outputs to V
CC
automatically sets the number of channels. The phase
relationship between the channels is 360 degrees/number of
active PWM channels. For example, for three channel
operation, the PWM outputs are separated by 120 degrees.
Figure 2 shows the PWM output signals for a four channel
system.
Power supply ripple frequency is determined by the channel
frequency, F
SW
, multiplied by the number of active channels.
For example, if the channel frequency is set to 250kHz and
there are three phases, the ripple frequency is 750kHz.
The IC monitors and precisely regulates the CORE voltage
of a microprocessor. After initial start-up, the controller also
provides protection for the load and the power supply. The
following section discusses these features.
Initialization
HIP6301V and HIP6302V circuits usually operate from an
ATX power supply. Many functions are initiated by the rising
supply voltage to the V
CC
pin of the controller. Oscillator,
Sawtooth Generator, Soft-Start and other functions are
initialized during this interval. These circuits are controlled by
POR, Power-On Reset. During this interval, the PWM
outputs are driven to a three state condition that makes
these outputs essentially open. This state results in no gate
drive to the output MOSFETS.
Once the V
CC
voltage reaches 4.375V (±125mV), a voltage
level to insure proper internal function, the PWM outputs are
enabled and the Soft-Start sequence is initiated. If for any
reason, the V
CC
voltage drops below 3.875V (±125mV). the
POR circuit shuts the converter down and again three states
the PWM outputs.
Soft-Start
After the POR function is completed with V
CC
reaching
4.375V, the soft-start sequence is initiated. Soft-Start, by its
slow rise in CORE voltage from zero, avoids an over-current
condition by slowly charging the discharged output
capacitors. This voltage rise is initiated by an internal DAC
that slowly raises the reference voltage to the error amplifier
input. The voltage rise is controlled by the oscillator
frequency and the DAC within the controller, therefore, the
output voltage is effectively regulated as it rises to the final
programmed CORE voltage value.
PWM 1
PWM 2
PWM 3
PWM 4
FIGURE 2. FOUR PHASE PWM OUTPUT AT 500kHz
HIP6301V, HIP6302V
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