参数资料
型号: HIP6301VCBZ-T
厂商: INTERSIL CORP
元件分类: 稳压器
英文描述: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO20
封装: LEAD FREE, PLASTIC, MS-013AC, SOIC-20
文件页数: 5/20页
文件大小: 518K
代理商: HIP6301VCBZ-T
5
FN9034.2
December 27, 2004
HIP6301V and HIP6302V Functional Pin Descriptions
VID4, VID3, VID2, VID1 and VID0 (Pins 1 thru 5 -
Both Parts)
Voltage Identification inputs. The HIP6301V and HIP6302V
decode the VID bits to establish the reference voltage (see
Table 1). Each pin has an internal 20
μ
A pull-up current source
to 2.5V making the parts compatible with CMOS and TTL
logic from 5V down to 2.5V. When a VID change is detected
the reference voltage slowly ramps up or down to the new
value in 25mV steps. VID input levels above 2.9V may
produce an reference-voltage offset inaccuracy.
COMP (Pin 6 - Both Parts)
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
FB (Pin 7 - Both Parts)
Inverting input of the internal error amplifier.
FS/DIS (Pin 8 - Both Parts)
Channel frequency, F
SW
, select and disable. A resistor from
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.
GND (Pin 9 - Both Parts)
Bias and reference ground. All signals are referenced to this
pin.
VSEN (Pin 10 - Both Parts)
Power good monitor input. Connect to the microprocessor-
CORE voltage.
PWM1 (Pin 15 - HIP6301V, Pin 14 - HIP6302V),
PWM2 (Pin 14 -HIP6301V, Pin 12 - HIP6302V),
PWM3 (Pin 11 - HIP6301V only) and PWM4 (Pin 18 -
HIP6301V only)
PWM outputs for each channel. Connect these pins to the
PWM input of the external MOSFET driver. For HIP6301V
systems using 3 channels, connect PWM4 high. For two
channel systems, connect PWM3 and PWM4 high.
ISEN1 (Pin 16 - HIP6301V, Pin 14 - HIP6302V),
ISEN2 (Pin 13 - HIP6301V, Pin 11 - HIP6302V),
ISEN3 (Pin 12 - HIP6301V only) and ISEN4 (Pin 17 -
HIP6301V only)
Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.
PGOOD (Pin 19 - HIP6301V, Pin 15 - HIP6302V)
Power good. This pin is an open-drain logic signal that
indicates when the microprocessor CORE voltage (VSEN
pin) is within specified limits and Soft-Start has timed out.
V
CC
(Pin 20 - HIP6301V, Pin 16 - HIP6302V)
Bias supply. Connect this pin to a 5V supply.
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
VID4
VID3
VID2
VID1
VID0
FS/DIS
PWM2
PGOOD
PWM3
ISEN4
ISEN1
V
CC
GND
ISEN3
FB
PWM4
VSEN
COMP
PWM1
ISEN2
HIP6301V PINOUT
9
10
11
12
13
14
16
15
8
7
6
5
4
3
2
1
VID4
VID3
VID2
VID1
VID0
FS/DIS
VSEN
PGOOD
PWM2
V
CC
FB
COMP
ISEN2
GND
HIP6302V PINOUT
ISEN1
PWM1
HIP6301V, HIP6302V
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