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参数资料
| 型号： | HIP6500 |
| 厂商： | Intersil Corporation |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 多重线性电源控制器ACPI控制接口 |
| 文件页数： | 1/15页 |
| 文件大小： | 155K |
| 代理商： | HIP6500 |
1
HIP6500
Multiple Linear Power Controller with
ACPI Control Interface
The HIP6500 complements either an HIP6020 or an HIP6021
in ACPI-compliant designs for microprocessor and computer
applications. The IC integrates two linear controllers and two
regulators, switching, monitoring and control functions into a
20-pin SOIC package. One linear controller generates the
3.3V
DUAL
voltage plane from the ATX supply’s 5VSB output,
powering the PCI slots through an external pass transistor
during sleep states (S3, S4/S5). A second transistor is used to
switch in the ATX 3.3V output for operation during S0 and
S1/S2 (active) operating states. The second linear controller
supplies the computer system’s 2.5V/3.3V memory power
through an external pass transistor in active states. During S3
state, an integrated pass transistor supplies the 2.5V/3.3V
sleep power. A third controller powers up the 5V
DUAL
plane by
switching in the ATX 5V output in active states, and the ATX
5VSB in sleep states. The two internal regulators consist of a
low current 3.3V sleep output and a dedicated, noise-free 2.5V
clock chip supply. The HIP6500’s operating mode (active
outputs or sleep outputs) is selectable through two digital
control pins, S3 and S5. Further control of the logic governing
activation of different power states is offered through two
configuration pins, EN3VDL and EN5VDL. In active state, the
3.3V
DUAL
linear regulator uses an external N-Channel pass
MOSFET to connect the output directly to the 3.3V input
supplied by an ATX (or equivalent) power supply, for minimal
losses.Insleepstate,powerdelivery onthe3.3V
DUAL
output is
transferred to an NPN transistor, also external to the controller.
Active state power delivery for the 2.5/3.3V
MEM
output is
performed through an external NPN transistor, or an NMOS
switch for the 3.3V setting. In sleep state, conduction on this
output is transferred to an internal pass transistor. The 5V
DUAL
output is powered through two external MOS transistors. In
sleep states, a PMOS (or PNP) transistor conducts the current
from the ATX 5VSB output; while in active state, current flow is
transferred to an NMOS transistor connected to the ATX 5V
output. Similar to the 3.3V
DUAL
output, the operation of the
5V
DUAL
output is dictated not only by the status of the S3 and
S5 pins, but that of the EN5VDL pin as well. The 3.3V
SB
internal regulator is active for as long as the ATX 5VSB voltage
is applied to the chip, and derives its output current from the
5VSB pin. The 2.5V
CLK
output is only active during S0 and
S1/S2, and uses the 3V3 pin as input source for its internal
pass element.
Ordering Information
Features
Provides 5 ACPI-Controlled Voltages
- 5V Active/Sleep (5V
DUAL
)
- 3.3V Active/Sleep (3.3V
DUAL
)
- 2.5V/3.3V Active/Sleep (2.5V
MEM
)
- 3.3V Always Present (3.3V
SB
)
- 2.5V Clock (Active Only) (2.5V
CLK
)
Excellent Output Voltage Regulation
- 3.3V
DUAL
Output:
±
2.0% Over Temperature; Sleep
State Only
- 2.5V/3.3V
MEM
Output:
±
2.0% Over Temperature; Both
Operational States (3.3V setting in sleep only)
- 2.5V
CLK
and 3.3V
SB
Output:
±
2.0% Over Temperature
Small Size
- Very Low External Component Count
Selectable Memory Output Voltage Via FAULT/MSEL Pin
- 2.5V for RDRAM Memory
- 3.3V for SDRAM Memory
Under-Voltage Monitoring of All Outputs with Centralized
FAULT Reporting and Temperature Shutdown
Applications
Motherboard Power Regulation for ACPI-Compliant
Computers
Pinout
HIP6500
(SOIC)
TOP VIEW
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HIP6500CB
0 to 70
20 Ld SOIC
M20.3
HIP6500EVAL1
Evaluation Board
14
15
16
17
18
19
20
7
6
5
4
3
2
1
5VSB
3V3SB
VCLK
3V3DLSB
3V3DL
VSEN2
EN3VDL
5V
5VDLSB
12V
DLA
SS
3V3
DRV2
EN5VDL
5VDL
13
8
11
12
10
9
S3
S5
FAULT/MSEL
GND
Data Sheet
December 1999
File Number
4774.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
相关PDF资料 |
PDF描述 |
|---|---|
| HIP6500CB | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500EVAL1 | Multiple Linear Power Controller with ACPI Control Interface |
| HIP6501 | Triple Linear Power Controller with ACPI Control Interface |
| HIP6501A | Triple Linear Power Controller with ACPI Control Interface(带ACPI控制接口的线性电源控制器) |
| HIP6501EVAL1 | Triple Linear Power Controller with ACPI Control Interface |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6500 WAF | 制造商:Intersil Corporation 功能描述: |
| HIP6500_00 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Multiple Linear Power Controller with ACPI Control Interface |
| HIP6500BCB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HIP6500BCB WAF | 制造商:Harris Corporation 功能描述: |
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