- 您现在的位置：买卖IC网 > PDF目录385382 > HIP6503EVAL1 (Intersil Corporation) Multiple Linear Power Controller with ACPI Control Interface PDF资料下载
参数资料
| 型号： | HIP6503EVAL1 |
| 厂商： | Intersil Corporation |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 多重线性电源控制器ACPI控制接口 |
| 文件页数： | 6/14页 |
| 文件大小： | 151K |
| 代理商： | HIP6503EVAL1 |
6
Functional Pin Description
3V3 (Pin 7)
Connect this pin to the ATX 3.3V output. This pin provides
the output current for the 2V5CLK pin, and is monitored for
power quality.
5VSB (Pin 2)
Provide a very well de-coupled 5V bias supply for the IC to
this pin by connecting it to the ATX 5VSB output. This pin
provides the output current for the VSEN1 and VSEN2 pins,
as well as the base current for Q2. The voltage at this pin is
monitored for power-on reset (POR) purposes.
5V (Pin 18)
Connect this pin to the ATX 5V output. This pin provides the
base bias current for Q1, and is monitored for power quality.
12V (Pin 17)
Connect this pin to the ATX 12V output. This pin provides the
gate bias voltage for Q3, Q5 and Q6, and is monitored for
power quality.
GND (Pin 11)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
S3 and S5 (Pins 9 and 10)
These pins switch the IC’s operating state from active (S0,
S1/S2) to S3 and S4/S5 sleep states. These are digital
inputs featuring internal 50k
(typical) resistor pull-ups to
5VSB. Internal circuitry de-glitches these pins for
disturbances lasting as long as 2
μ
s (typically). Additional
circuitry blocks any illegal state transitions (such as S3 to
S4/S5 or vice versa). Respectively, connect S3 and S5 to the
computer system’s SLP_S3 and SLP_S5 signals.
EN5VDL (Pin 8)
This pin enables or disables sleep state support on the
5V
DUAL
output in response to S3 and S4/S5 requests. This
is a digital input pin whose status can only be changed
during active state operation or during chip shutdown (SS
pin grounded by external open-drain device or chip bias
below POR level). The input information is latched-in when
entering a sleep state, as well as following 5VSB POR
release or exit from shutdown. EN5VDL is internally pulled
high through a 40
μ
A current source.
FAULT/MSEL (Pin 12)
This is a multiplexed function pin allowing the setting of the
memory output voltage to either 2.5V or 3.3V (for RDRAM or
SDRAM memory systems). An internal 40
μ
A current source
creates a voltage across an external resistor - this voltage
level is compared to an internal 200mV reference and the
memory regulator output voltage is set.
In case of an undervoltage on any of the controlled outputs,
on any of the monitored ATX supplies, or in case of an
overtemperature event, this pin is used to report the fault
condition by being pulled to 5VSB.
SS (Pin 16)
Connect this pin to a small ceramic capacitor (no less than
5nF; 0.1
μ
F recommended). The internal soft-start (SS)
current source along with the external capacitor creates a
voltage ramp used to control the ramp-up of the output
voltages. Pulling this pin low with an open-drain device shuts
down all the outputs as well as force the FAULT pin low. The
C
SS
capacitor is also used to provide a controlled voltage
slew rate during active-to-sleep transitions on the
3.3V
DUAL
/3.3V
SB
and 2.5V
MEM
/3.3V
MEM
outputs.
VSEN2 (Pin 1)
Connect this pin to the memory output (V
OUT2
). In sleep
states, this pin is regulated to 2.5V through an internal pass
transistor capable of delivering 300mA (typically). The
active-state voltage at this pin is regulated through an
external NPN transistor connected at the DRV2 pin. During
all operating states, the voltage at this pin is monitored for
under-voltage events.
DRV2 (Pin 19)
Connect this pin to the base of a suitable NPN transistor.
This pass transistor regulates the 2.5V output from the ATX
3.3V during active states operation.
3V3DL (Pin 5)
Connect this pin to the 3.3V dual/stand-by output (V
OUT3
).
In sleep states, the voltage at this pin is regulated to 3.3V; in
active states, ATX 3.3V output is delivered to this node
through a fully on N-MOS transistor. During all operating
states, this pin is monitored for under-voltage events.
3V3DLSB (Pin 4)
Connect this pin to the base of a suitable NPN transistor. In
sleep state, this transistor is used to regulate the voltage at
the 3V3DL pin to 3.3V.
DLA (Pin 13)
Connect this pin to the gates of suitable N-MOSFETs, which
in active state, switch in the ATX 3.3V and 5V outputs into
the 3.3V
MEM
, 3.3V
DUAL
/3.3V
SB
and 5V
DUAL
outputs,
respectively.
5VDL (Pin 15)
Connect this pin to the 5V
DUAL
output (V
OUT5
). In either
operating state, the voltage at this pin is provided through a
fully on MOS transistor. This pin is also monitored for under-
voltage events.
5VDLSB (Pin 14)
Connect this pin to the gate of a suitable P-MOSFET or
bipolar PNP. In sleep state, this transistor is switched on,
connecting the ATX 5VSB output to the 5V
DUAL
regulator
output.
HIP6503
相关PDF资料 |
PDF描述 |
|---|---|
| HIP6503CB | Circular Connector; No. of Contacts:37; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-35 |
| HIP6503 | Multiple Linear Power Controller with ACPI Control Interface(集成了多个线性电源控制器的芯片（ACPI控制接口）) |
| HIP6602ACB | FPGA 1600000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6602ACR | FPGA 1600000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6602ACR-T | FPGA 1600000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HIP6521 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM and Triple Linear Power Controller |
| HIP6521_06 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM and Triple Linear Power Controller |
| HIP6521CB | 功能描述:IC REG QD BCK/LINEAR SYNC 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（3），线性（LDO）（2） 功能:任何功能 输出数:5 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:5.6 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| HIP6521CB-T | 功能描述:IC REG QD BCK/LINEAR SYNC 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 + 切换式 系列:- 标准包装:2,500 系列:- 拓扑:降压（降压）同步（3），线性（LDO）（2） 功能:任何功能 输出数:5 频率 - 开关:300kHz 电压/电流 - 输出 1:控制器 电压/电流 - 输出 2:控制器 电压/电流 - 输出 3:控制器 带 LED 驱动器:无 带监控器:无 带序列发生器:是 电源电压:5.6 V ~ 24 V 工作温度:-40°C ~ 85°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| HIP6521CBZ | 功能描述:电压模式 PWM 控制器 4 IN 1 PWM/LINEAR CNTRLR 5V RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。