参数资料
型号: HM5117405S-5
元件分类: DRAM
英文描述: 4M X 4 EDO DRAM, 50 ns, PDSO24
封装: 0.300 INCH, PLASTIC, SOJ-26/24
文件页数: 29/35页
文件大小: 346K
代理商: HM5117405S-5
HM5116405 Series, HM5117405 Series
35
Revision Record
Rev.
Date
Contents of Modification
Drawn by
Approved by
1.0
Oct. 14, 1996
Initial issue
Y. Kasama
M. Mishima
2.0
Nov. 8, 1996
Addition of HM5116405-5 Series
Addition of HM5117405-5 Series
Power dissipation (active)
550/495 mW(max) to 495/440/385 mW (max)
(HM5116405 Series)
605/550 mW(max) to 550/495/440 mW (max)
(HM5117405 Series)
DC Characteristics (HM5116405 Series)
I
CC7 max:
110/100 mA to 80/70/65 mA
DC Characteristics (HM5117405 Series)
I
CC1 max:
110/100 mA to 100/90/80 mA
I
CC3 max:
110/100 mA to 100/90/80 mA
I
CC6 max:
110/100 mA to 100/90/80 mA
I
CC7 max:
110/100 mA to 90/80/75 mA
AC Characteristics
t
RCD min:
20/20 ns to 11/14/14 ns
t
RAD min:
15/15 ns to 9/12/12 ns
t
RSH min:
15/18 ns to 10/13/13 ns
t
RRH min:
0/0 ns to 5/5/5 ns
t
RWC min:
149/175 ns to 111/135/161 ns
t
RWD min:
82/95 ns to 67/79/92 ns
t
CWD min:
37/43 ns to 30/34/40 ns
t
AWD min:
52/60 ns to 42/49/57 ns
t
RPC min:
0/0 ns to 5/5/5 ns
t
HPRWC min:
79/90 ns to 57/68/79 ns
Timing Waveforms
Addition of t
RNCD timing to EDO page mode mix
cycle (2)
Y. Kasama
Y. Matsuno
3.0
Feb. 27, 1997
AC Characteristics
t
RRH min:
5/5/5 ns to 0/0/0 ns
Y. Kasama
Y. Matsuno
4.0
Nov. 1997
Change of Subtitle
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相关代理商/技术参数
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HM5117405S-6 制造商:HITACHI 制造商全称:Hitachi Semiconductor 功能描述:16M EDO DRAM (4-MWORD X 4-BIT) 4K REFRESH / 2K REFRESH
HM5117405S-7 制造商:ELPIDA 制造商全称:Elpida Memory 功能描述:16 M EDO DRAM (4-Mword ′ 4-bit) 4 k Refresh/2 k Refresh
HM5117405TS-5 制造商:HITACHI 制造商全称:Hitachi Semiconductor 功能描述:16M EDO DRAM (4-MWORD X 4-BIT) 4K REFRESH / 2K REFRESH
HM5117405TS-6 制造商:HITACHI 制造商全称:Hitachi Semiconductor 功能描述:16M EDO DRAM (4-MWORD X 4-BIT) 4K REFRESH / 2K REFRESH
HM5117405TS-7 制造商:HITACHI 制造商全称:Hitachi Semiconductor 功能描述:16M EDO DRAM (4-MWORD X 4-BIT) 4K REFRESH / 2K REFRESH