
For price, delivery, and to place orders, please contact Hittite Microwave Corporation:
20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373
Order On-line at www.hittite.com
P
O
W
E
R
D
E
T
E
C
T
O
R
S
-
SM
T
12
12 - 45
-40
-36
-32
-28
-24
-20
-16
-12
-8
-4
0
4
2
4
6
8
10
12
14
16
V
TGT
= 0.5V
V
TGT
= 1.25V
V
TGT
= 2.0V
V
TGT
= 2.75V
V
TGT
= 3.50V
RMSOUT
ERROR
(dB)
CREST FACTOR (dB)
RMS Output Error vs. Crest Factor
**Worst Case Conditions**
using circuit described in “ Application & Evaluation PCB
Schematic” section
System Calibration
Due to part-to-part variations in log-slope and log-intercept, a system-level calibration is recommended to satisfy
absolute accuracy requirements. When performing this calibration, choose at least two test points: near the top end
and bottom-end of the measurement range. It is best to measure the calibration points in the regions (of frequency and
amplitude) where accuracy is most important. Derive the log-slope and log-intercept, and store them in non-volatile
memory.
HMC610LP4 / 610LP4E
v12.0309
RMS POWER DETECTOR
75 dB, DC - 3.9 GHz
Adjusting VTGT for greater precision
There are two competing aspects of performance, for which VTGT can be used to set a preference. Depending on
which aspect of precision is more important to the application, the VTGT pin can be used to find a compromise between
two sources of RMS output error: internal DC offset cancellation error and deviation at high crest factors (>10 dB).
Increasing VTGT input voltage will improve internal DC offset cancellation, but deviation at high crest factors will
increase slightly. A 50% increase in VTGT should produce an 18% improvement in RMS precision due to improved
DC offset cancellation performance.
Decreasing VTGT input voltage will reduce errors at high crest factors, but DC offset cancellation performance
will be slightly degraded. See “RMS Output Error vs. Crest Factor” graph.
If input signal crest factor is not expected to exceed 10 dB, you can improve RMS precision by increasing VTGT
voltage. Keep in mind that changing VTGT also adjusts the log-intercept point, which shifts the “input dynamic range”.
The best set-point for VTGT will be the lowest voltage that still maintains the “input dynamic range” over the required
range of input power. This new VTGT set-point should optimize DC offset correction performance.
If error performance for crest factors >10 dB requires optimization, set VTGT for the maximum tolerable error at the
highest expected crest factor. Increasing VTGT beyond that point will unnecessarily compromise internal DC offset
cancellation performance. After changing VTGT, re-verify that the “input dynamic range” still covers the required range
of input power.
VTGT should be referenced to VREF for best performance. It is recommended to use a temperature stable DC amplifier
between VTGT and VREF to create VTGT > VREF. The VREF pin is a temperature compensated voltage reference output,
only intended for use with VTGT.
VT
Error due to Internal DC Offsets
1.0V
Nominal +0.2 dB
1.5V
Nominal +0.1 dB
2.0V
Nominal
3.0V
Nominal -0.06 dB
3.5V
Nominal -0.1 dB
V
TGT Influence on DC Offset Compensation