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参数资料
| 型号： | HMP8156CN |
| 厂商： | HARRIS SEMICONDUCTOR |
| 元件分类： | 颜色信号转换 |
| 英文描述： | NTSC/PAL Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 文件页数： | 16/40页 |
| 文件大小： | 563K |
| 代理商： | HMP8156CN |
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TABLE 11. COLOR SATURATION ADJUST FACTOR
DESTINATION ADDRESS = 05
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 0
Color Saturation
Adjust Factor
This register sets the color saturation adjust factor. This value is multiplied by the chromi-
nance (CbCr) data and allows the data to be scaled from 0 to a factor of +1.96875. This 8-bit
number is a fractional number as shown below:
2
0
2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
The contrast factor is applied after the brightness.
1001 1101
B
TABLE 12. PHASE LOCKED LOOP CHROMINANCE SUBCARRIER TO BUS CLOCK FREQUENCY RATIO
DESTINATION ADDRESS = 06
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 0
Chroma PLL Ratio
These bits are used to program the ratio of the incoming video chrominance color sub-
carrier frequency to the BUS Clock used. This number serves as the reference frequency
of the chrominance PLL and must be very accurate. This is the lower byte of the ratio and
encompasses the following range:
2
-9
2
-10
2
-11
2
-12
2
-13
2
-14
2
-15
2
-16
The default value is for a CLK frequency of 27MHz and a color subcarrier of 3.579545
MHz.
1100 0001
B
TABLE 13. PHASE LOCKED LOOP CHROMINANCE SUBCARRIER TO BUS CLOCK FREQUENCY RATIO
DESTINATION ADDRESS = 07
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
15 - 8
Chroma PLL Ratio
These bits are used to program the ratio of the incoming video chrominance color sub-
carrier frequency to the BUS Clock used. This number serves as the reference frequency
of the chrominance PLL and must be very accurate. This is the upper byte of the ratio
and encompasses the following range:
2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
2
-8
1000 0111
B
TABLE 14. HORIZONTAL AGC START TIME REGISTER
DESTINATION ADDRESS = 08
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 0
Horizontal AGC
Pulse Programmable
Start Time
This register provides a programmable delay for the HAGC pulse that control the sync
tip AGC in the A/D converters. The start time of the HAGC pulse is set from the detection
of horizontal sync in the video data. HAGC is programmable in CLK increments and has
a fixed 1 clock delay following the falling edge of horizontal sync. This is the lower byte
of the 10-bit word.
0011 1111
B
TABLE 15. HORIZONTAL AGC START TIME REGISTER
DESTINATION ADDRESS = 09
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
15 - 10
Not Used
Write Ignored, Read 0’s.
XXXX XX
HMP8112
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相关代理商/技术参数 |
参数描述 |
|---|---|
| HMP8156EVAL1 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:NTSC/PAL Encoders |
| HMP8156EVAL2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HMP8170 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8170_03 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8170CN | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
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