参数资料
型号: HY57V283220T-P
厂商: HYNIX SEMICONDUCTOR INC
元件分类: DRAM
英文描述: 4 Banks x 1M x 32Bit Synchronous DRAM
中文描述: 4M X 32 SYNCHRONOUS DRAM, 6 ns, PDSO86
封装: 0.400 X 0.875 INCH, 0.50 MM PITCH, TSOP2-86
文件页数: 13/15页
文件大小: 916K
代理商: HY57V283220T-P
Rev. 0.9 / July 2004
13
HY57V283220(L)T(P) / HY5V22(L)F(P)
COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don¢t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
3. The burst read sigle write mode is entered by programming the write burst mode bit (A9) in the mode register to a logic 1.
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
L
L
L
L
X
OP code
No Operation
H
X
H
X
X
X
X
X
L
H
H
H
Bank Active
H
X
L
L
H
H
X
RA
V
Read
H
X
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
H
X
L
H
L
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
H
X
L
L
H
L
X
X
H
X
Precharge selected Bank
L
V
Burst Stop
H
X
L
H
H
L
X
X
DQM
H
X
V
X
Auto Refresh
H
H
L
L
L
H
X
X
Burst-Read-Single-WRITE
H
X
L
L
L
L
X
A9 Pin High
(Other Pins OP code)
3
Self Refresh
1
Entry
H
L
L
L
L
H
X
X
Exit
L
H
H
X
X
X
X
L
H
H
H
Precharge power
down
Entry
H
L
H
X
X
X
X
X
L
H
H
H
Exit
L
H
H
X
X
X
X
L
H
H
H
Clock
Suspend
Entry
H
L
H
X
X
X
X
X
L
V
V
V
Exit
L
H
X
X
相关PDF资料
PDF描述
HY57V283220TP-5 4 Banks x 1M x 32Bit Synchronous DRAM
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HY57V283220TP-5 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4 Banks x 1M x 32Bit Synchronous DRAM
HY57V283220TP-55 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4 Banks x 1M x 32Bit Synchronous DRAM
HY57V283220TP-6 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4 Banks x 1M x 32Bit Synchronous DRAM
HY57V283220TP-7 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4 Banks x 1M x 32Bit Synchronous DRAM
HY57V283220TP-8 制造商:HYNIX 制造商全称:Hynix Semiconductor 功能描述:4 Banks x 1M x 32Bit Synchronous DRAM