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| 型号： | IBIS4-1300-M-1 |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | 1.3 MPxl Rolling Shutter CMOS Image Sensor |
| 中文描述： | 1.3 MPxl卷帘门的CMOS图像传感器 |
| 文件页数： | 21/37页 |
| 文件大小： | 1168K |
| 代理商： | IBIS4-1300-M-1 |
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IBIS4-1300
Document Number: 38-05707 Rev. *B
Page 21 of 37
Figure 15. shows a typical operation mode of the image
sensor.
At the start of a new frame, the device may be (re-)configured.
If necessary, the output amplifier gain and offset are adjusted
or the device is put in viewfinder mode.
Then, the frame readout shift register is initiated by pulsing
"SYNC_YR". This pulse occurs once per frame, normally as a
part of the first row blanking sequence.
The readout of a row (line) starts with row blanking initialization
sequence. Here several pulses are applied for Y-direction
shift, the column amplifier S&H and nulling, and the start
(SYNC_X) of the X-direction shift register.
The frame reset shift register is started also once per frame by
"SYNC_YL", this pulse occurs once per frame, normally as a
part of the row blanking sequence of one particular row. The
time delay from the SYNC_YL to SYNC_YR is the integration
time. The integration is thus a multiple of the row readout time.
The reset shift register always leads the readout shift register.
Therefore, the integration time should be determined before
the start of the frame readout. The value that is fixed at that
moment will be the integration time of the NEXT frame. If the
value set for the integration time changes during frame
readout, the start pulse might be lost and the next frame might
be invalid. We will now discuss all steps in more detail.
Set configuration
Configuration of the image sensor implies control &
adjustment of the following points:
output amplifier offset level, set by 'dac_bit[0...3]'
output amplifier gain setting, set by 'gc_bit[0...3]'
choose the integration time of the next frame
set/clear viewfinder mode (pin 'subsampl')
in case when the fast adjustment of the offset level is used,
plus 'calib_f' and 'unitygain' as described before in figures
Figure 7. and Figure 8.
Viewfinder mode vs. normal readout
In full image readout mode (pin 84, subsmpl = 0), the imager
is a 1280 x 1024 SXGA image sensor. There are 3 dummy
pixels read at all 4 borders of the image.
In viewfinder mode (subsmpl = 1), the imager acts as a 320 x
256 QVGA image sensor with one dummy pixel at the start of
a row/column.
Table 8. shows which column or row is selected after a
number of clock pulses.
Start of the Y shift registers for row readout & row reset
The shift registers are put in their initial state by a
synchronization- or start pulse. (sync_x, sync_yr, sync_yl).
The synchronization signal is low-active and should only be
generated when the clock of the shift register is high. After the
synchronization pulse, two falling clock edges are needed to
skip dummy pixels/lines. On every falling clock edge, the shift
register selects a new row for readout or reset. Figure 16.
shows this timing.
Table 8. co-ordinate of the row or column selected by the Y/X shift registers after a # clock periods in viewfinder mode
and full image mode
Clock
Sync
1
2
3
4
5
6
Viewfinder mode
None
None
Row 1
Row 5
Row 9
Row 13
Row 17
Y reg.
Dark
Col. 1
Col. 5
Col. 9
Col. 13
X reg.
Full image mode
None
None
Row 1
Row 2
Row 3
Row 4
Row 5
Y reg.
Dark
Col. 1
Col. 2
Col. 3
Col. 4
X reg.
Clock
258
259
260
322
323
324
Viewfinder mode
Row 1025
Row 1029
EOS
Col. 1281
Col. 1285
EOS Dark
Clock
1030
1031
1032
1287
1288
1289
Full image mode
Row 1029
Row 1030
EOS
Col. 1285
Col. 1286
EOS Dark
Y shift register
X shift register
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