- 您现在的位置：买卖IC网 > PDF目录67683 > IBM25PPC750FX-EB0122T 32-BIT, 600 MHz, RISC PROCESSOR, CBGA292 PDF资料下载
参数资料
| 型号： | IBM25PPC750FX-EB0122T |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 600 MHz, RISC PROCESSOR, CBGA292 |
| 封装： | 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292 |
| 文件页数： | 11/62页 |
| 文件大小： | 452K |
| 代理商： | IBM25PPC750FX-EB0122T |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
DD 2.X
Preliminary
PowerPC 750FX RISC Microprocessor
Body_750FX_DS_DD2.X.fm.2.0
June 9, 2003
3. Electrical and Thermal Characteristics
Page 17 of 63
3.5 60x Bus Output AC Specications
Table 3-8 provides the 60x bus output AC timing specifications for the 750FX as defined in Figure 3-6 on
Table 3-8. 60x Bus Output AC Timing Specications
See Table 3-2 on page 10 for operating conditions.1, 5
Num
Characteristic
1.8V
2.5V
3.3V
Unit
Notes
Min.
Max.
Min.
Max.
Min.
Max.
12
SYSCLK to Output Driven
(Output Enable Time)
0.3
—
0.3
—
0.3
—
ns
—
13
SYSCLK to Output Valid
—
2.3
—
2.5
—
2.5
ns
2, 6
14
SYSCLK to Output Invalid (Output Hold)
0.5
—
0.55
—
0.55
–
ns
2, 7
15
SYSCLK to Output High Impedance
(all signals except ARTRY, ABB and DBB)
—
2.5
—
2.5
—
2.5
ns
—
16
SYSCLK to ABB and DBB high impedance
after precharge
—
1.0
—
1.0
—
1.0
tSYSCLK
3, 4
17
SYSCLK to ARTRY high impedance
before precharge
—
3.0
—
3.0
—
3.0
ns
—
18
SYSCLK to ARTRY precharge enable
0.2
×
tSYSCLK +
1.0
0.2
×
tSYSCLK +
1.0
—
0.2
×
tSYSCLK +
1.0
—
ns
2, 3, 4
19
Maximum delay to ARTRY precharge
—
1.0
—
1.0
—
1.0
tSYSCLK
3, 4
20
SYSCLK to ARTRY high impedance
after precharge
—
2.0
tSYSCLK
3, 4
Notes:
1. All output specifications are measured from the VM of the rising edge of SYSCLK to the output signal level defined in Figure 3-5 on
page 18. Both input and output timings are measured at the pin. Timings are determined by design.
2. This minimum parameter assumes CL = 0pF.
3. tSYSCLK is the period of the external bus clock (SYSCLK) in nanoseconds (ns). The numbers given in the table must be multiplied
by the period of SYSCLK to compute the actual time duration of the parameter in question.
4. Nominal precharge width for ARTRY is 1.0 tSYSCLK.
5. Guaranteed by design and characterization, and not tested.
6. Output Valid timing increases as the VDD in reduced. These values assumes VDD minimum of 1.35V.
相关PDF资料 |
PDF描述 |
|---|---|
| IBM25PPC750GLECR5HA3T | 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA292 |
| IBM25PPC750GXEAR5H42T | 32-BIT, 933 MHz, RISC PROCESSOR, CBGA292 |
| IBM25PPC750GXEBB6H42T | 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA292 |
| IBM25PPC750GXEBR2H33T | 32-BIT, 800 MHz, RISC PROCESSOR, CBGA292 |
| IBM25PPC750GXECB5H43T | 32-BIT, 933 MHz, RISC PROCESSOR, CBGA292 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IBM25PPC750FX-FB1013T | 制造商:IBM 功能描述:32-BIT, 733 MHZ, RISC PROCESSOR, CBGA292 |
| IBM25PPC750FX-FB2513T | 制造商:IBM 功能描述:32-BIT, 800 MHz, RISC PROCESSOR, CBGA292 |
| IBM25PPC750FX-GB0122V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FX-GB0132T | 制造商:IC'S/TRANSISTORS/DIO 功能描述: 制造商:IC'S/TRANSISTORS/DIODES 功能描述: |
| IBM25PPC750FX-GB0132V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
发布紧急采购，3分钟左右您将得到回复。