参数资料
型号: ICL7136CPL
厂商: Intersil
文件页数: 7/15页
文件大小: 0K
描述: IC ADC 3.5 DIGIT LCD 40-DIP
标准包装: 9
显示器类型: LCD
配置: 7 段显示
数字或字符: A/D,3.5 位数字
电流 - 电源: 70µA
电源电压: 9V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 40-DIP(0.600",15.24mm)
供应商设备封装: 40-DIP
包装: 管件
其它名称: ICL7136CPLIS
ICL7136
? V IN ?
? V REF ?
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO
for a fixed time. This differential voltage can be within a wide
common mode range: up to 1V from either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog
COMMON to establish the correct common mode voltage. At
the end of this phase, the polarity of the integrated signal is
determined.
De-Integrate Phase
The final phase is de-integrate, or reference integrate. Input
low is internally connected to analog COMMON and input
high is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the capacitor
will be connected with the correct polarity to cause the
integrator output to return to zero. The time required for the
output to return to zero is proportional to the input signal.
Specifically the digital reading displayed is:
DISPLAY READING = 1000 ? --------------- ? .
Zero Integrator Phase
The final phase is zero integrator. First, input low is shorted to
analog COMMON. Second, the reference capacitor is charged
to the reference voltage. Finally, a feedback loop is closed
around the system to IN HI to cause the integrator output to
return to zero. Under normal conditions, this phase lasts for
between 11 to 140 clock pulses, but after a “heavy” overrange
conversion, it is extended to 740 clock pulses.
Differential Input
The input can accept differential voltages anywhere within the
common mode range of the input amplifier, or specifically from
0.5V below the positive supply to 1V above the negative supply.
In this range, the system has a CMRR of 86dB typical.
However, care must be exercised to assure the integrator
output does not saturate. A worst case condition would be a
large positive common mode voltage with a near full scale
negative differential input voltage. The negative input signal
drives the integrator positive when most of its swing has been
used up by the positive common mode voltage. For these
critical applications the integrator output swing can be reduced
to less than the recommended 2V full scale swing with little loss
of accuracy. The integrator output can swing to within 0.3V of
either supply without loss of linearity.
Differential Reference
The reference voltage can be generated anywhere within the
power supply voltage of the converter. The main source of
common mode error is a roll-over voltage caused by the
reference capacitor losing or gaining charge to stray
capacity on its nodes. If there is a large common mode
voltage, the reference capacitor can gain charge (increase
voltage) when called up to de-integrate a positive signal but
lose charge (decrease voltage) when called up to de-
integrate a negative input signal. This difference in reference
for positive or negative input voltage will give a roll-over
error. However, by selecting the reference capacitor such
that it is large enough in comparison to the stray
capacitance, this error can be held to less than 0.5 count
worst case. (See Component Value Selection.)
STRAY
C REF
STRAY
R INT
C AZ
C INT
C REF+
REF HI
REF LO
C REF -
BUFFER V+
A-Z
INT
V+
34
36
35
33
28
1
29
27
31
10 μ A
A-Z,
ZI
A-Z,
ZI
-
+
2.8V
INTEGRATOR
-
+
-
+
TO
DIGITAL
SECTION
IN HI
INT
DE-
DE+
INPUT
6.2V
A-Z
HIGH
A-Z
32
DE+
DE-
N
-
+
ZI
COMPARATOR
COMMON
30
INT
A-Z AND DE (±)
AND ZI
INPUT
LOW
IN LO
26
V-
FIGURE 2. ANALOG SECTION OF ICL7136
7
FN3086.6
July 21, 2005
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