参数资料
型号: ICL7663SCBAZA
厂商: Intersil
文件页数: 6/8页
文件大小: 0K
描述: IC REG LDO ADJ 40MA 8-SOIC
标准包装: 98
稳压器拓扑结构: 正,可调式
输出电压: 1.3 V ~ 16 V
输入电压: 1.5 V ~ 16 V
稳压器数量: 2
电流 - 输出: 40mA(最小)
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
ICL7663S
Detailed Description
The ICL7663S is a CMOS integrated circuit incorporating all
the functions of a voltage regulator plus protection circuitry
on a single monolithic chip. Referring to the Functional
Diagram, the main blocks are a bandgap-type voltage
may be advisable to use an RC network on the SHutDowN
pin to delay output turn-on. Battery charging surges,
transients, and assorted noise signals should be kept from
the regulators by RC filtering, zener protection, or even
fusing.
reference, an error amplifier, and an output driver with both
PMOS and NPN pass transistors.
The bandgap output voltage, trimmed to 1.29V ± 15mV for
SENSE
V OUT2
R CL
V OUT
the ICL7663SA, and the input voltage at the V SET terminal
are compared in amplifier A. Error amplifier A drives a
P-channel pass transistor which is sufficient for low (under
about 5mA) currents. The high current output is passed by
+
0.047 μ F
V OUT1
V TC
V SET
GND SHDN
S 2 S 1
(7663 ONLY)
R 2
R L
C L
an NPN bipolar transistor connected as a follower. This
configuration gives more gain and lower output impedance.
Logic-controlled shutdown is implemented via a N-Channel
-
M
+
-
I Q
R 1
1 μ A MIN
MOS transistor. Current-sensing is achieved with
comparator C, which functions with the V OUT2 terminal. The
ICL7663S has an output (V TC ) from a buffer amplifier (B),
which can be used in combination with amplifier A to
generate programmable-temperature-coefficient output
voltages.
The amplifier, reference and comparator circuitry all operate
at bias levels well below 1 μ A to achieve extremely low
quiescent current. This does limit the dynamic response of
the circuits, however, and transients are best dealt with
outside the regulator loop.
Basic Operation
The ICL7663S is designed to regulate battery voltages in the
5V to 15V region at maximum load currents of about 5mA to
30mA. Although intended as low power devices, power
dissipation limits must be observed. For example, the power
dissipation in the case of a 10V supply regulated down to 2V
with a load current of 30mA clearly exceeds the power
dissipation rating of the Mini-DIP:
(10 - 2) (30) (10 -3 ) = 240mW
The circuit of Figure 8 illustrates proper use of the device.
CMOS devices generally require two precautions: every
input pin must go somewhere, and maximum values of
applied voltages and current limits must be rigorously
observed. Neglecting these precautions may lead to, at the
least, incorrect or nonoperation, and at worst, destructive
device failure. To avoid the problem of latchup, do not apply
inputs to any pins before supply voltage is applied.
Input Voltages - The ICL7663S accepts working inputs of
1.5V to 16V. When power is applied, the rate-of-rise of the
input may be hundreds of volts per microsecond. This is
potentially harmful to the regulators, where internal
operating currents are in the nanoampere range. The
0.047 μ F capacitor on the device side of the switch will limit
inputs to a safe level around 2V/ μ s. Use of this capacitor is
suggested in all applications. In severe rate-of-rise cases, it
6
ON
S 3
OFF 1M ?
1.4V < V SHDN < V+ IN
NOTES:
7. S 1 when closed disables output current limiting.
8. Close S 2 for V OUT1 , open S 2 for V OUT2 .
9. IQ quiescent currents measured at GND pin by meter M.
10. S 3 when ON, permits normal operation, when OFF, shuts down
both V OUT1 and V OUT2 .
FIGURE 7. ICL7663S TEST CIRCUIT
Output Voltages - The resistor divider R 2 /R 1 is used to
scale the reference voltage, V SET , to the desired output
using the formula V OUT = (1 + R 2 /R 1 ) V SET . Suitable
arrangements of these resistors, using a potentiometer,
enables exact values for V OUT to be obtained. In most
applications the potentiometer may be eliminated by using
the ICL7663SA. The ICL7663SA has V SET voltage
guaranteed to be 1.29V ± 15mV and when used with ± 1%
tolerance resistors for R 1 and R 2 the initial output voltage
will be within ± 2.7% of ideal.
The low leakage current of the V SET terminal allows R 1 and
R 2 to be tens of megohms for minimum additional quiescent
drain current. However, some load current is required for
proper operation, so for extremely low-drain applications it is
necessary to draw at least 1 μ A. This can include the current
for R 2 and R 1 .
Output voltages up to nearly the V IN supply may be obtained
at low load currents, while the low limit is the reference
voltage. The minimum input-output differential in each
regulator is obtained using the V OUT1 , terminal. The input-
output differential increases to 1.5V when using V OUT2 .
Output Currents - Low output currents of less than 5mA are
obtained with the least input-output differential from the
V OUT1 terminal (connect V OUT2 to V OUT1 ). Where higher
currents are needed, use V OUT2 (V OUT1 , should be left
open in this case).
FN3180.5
July 21, 2005
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