参数资料
型号: ICM7211AMIPLZ
厂商: Intersil
文件页数: 4/8页
文件大小: 0K
描述: IC LCD DISPLAY DRVR 4DGT 40-DIP
标准包装: 9
显示器类型: LCD
配置: 7 段显示
数字或字符: 4 位数字
电流 - 电源: 10µA
电源电压: 3 V ~ 6 V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 40-DIP(0.600",15.24mm)
供应商设备封装: 40-DIP
包装: 管件
ICM7211AM
Input Definitions In this table, V DD and V SS are considered to be normal operating input logic levels. Actual input low and high levels are specified
under Operating Characteristics. For lowest power consumption, input signals should swing over the full supply.
B0
INPUT
DIP TERMINAL
27
CONDITIONS
V DD = Logical One
Ones (Least Significant)
FUNCTION
V SS = Logical Zero
B1
B2
28
29
V DD = Logical One
V SS = Logical Zero
V DD = Logical One
Twos
Fours
Data Input Bits
V SS = Logical Zero
B3
30
V DD = Logical One
Eights (Most Significant)
V SS = Logical Zero
OSC
36
Floating or with External
Oscillator Input
Capacitor to V DD
V SS
Disables BP output devices, allowing segments to be synchronized to an
external signal input at the BP terminal (Pin 5).
Interface Input Configuration
INPUT
DA1
DA2
CS1
DESCRIPTION
Digit Address
Bit 1 (LSB)
Digit Address
Bit 2 (MSB)
Chip Select 1
DIP TERMINAL
31
32
33
CONDITIONS
V DD = Logical One
V SS = Logical Zero
V DD = Logical One
V SS = Logical Zero
V DD = Inactive
FUNCTION
DA1 and DA2 serve as a 2-bit Digit Address Input
DA2, DA1 = 00 selects D4
DA2, DA1 = 01 selects D3
DA2, DA1 = 10 selects D2
DA2, DA1 = 11 selects D1
When both CS1 and CS2 are taken low, the data at the Data and Digit
V SS = Active
Select code inputs are written into the input latches. On the rising edge
CS2
Chip Select 2
34
V DD = Inactive
V SS = Active
of either Chip Select, the data is decoded and written into the output
latches.
Timing Diagram
CS1
(CS2)
CS2
(CS1)
DATA AND
t WI
t DS
t ICS
t DH
DIGIT
ADDRESS
= DON’T CARE
FIGURE 1. MICROPROCESSOR INTERFACE INPUT
4
FN3158.7
April 17, 2006
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