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参数资料
| 型号： | ICS180MI-01LF |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 3/9页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN LOW EMI 8-SOIC |
| 标准包装： | 97 |
| 类型： | 扩展频谱时钟发生器 |
| PLL： | 是 |
| 输入： | 时钟，晶体 |
| 输出： | CMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 28MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 3.135 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 其它名称： | 180MI-01LF |
ICS180-01
LOW EMI CLOCK GENERATOR
SSCG
IDT / ICS LOW EMI CLOCK GENERATOR
3
ICS180-01
REV D 051310
External Components
The ICS180-01 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 6 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50
trace (a commonly used trace
impedance) place a 33
resistor in series with the clock
line, as close to the clock output pin as possible. The
nominal impedance of the clock output is 20
.
value of these capacitors is given by the following
equation:
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitor should be mounted
on the component side of the board as close to the VDD
pin as possible. No vias should be used between the
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via.
2) To minimize EMI, the 33
series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed away
from the ICS180-01. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS180MI-01LFT | 功能描述:IC CLOCK GEN LOW EMI 8-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| ICS180MI-01T | 功能描述:IC CLOCK GEN LOW EMI 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS18101 | 制造商:ICS 制造商全称:ICS 功能描述:Low EMI Clock Generator |
| ICS18102 | 制造商:ICS 制造商全称:ICS 功能描述:Low EMI Clock Generator |
| ICS181-03 | 制造商:ICS 制造商全称:ICS 功能描述:Low EMI Clock Generator |
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