参数资料
型号: ICS1893BFLF
厂商: IDT, Integrated Device Technology Inc
文件页数: 133/133页
文件大小: 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
标准包装: 30
系列: PHYceiver™
类型: PHY 收发器
规程: MII
电源电压: 3.14 V ~ 3.47 V
安装类型: 表面贴装
封装/外壳: 48-BSSOP(0.295",7.50mm 宽)
供应商设备封装: 48-SSOP
包装: 管件
其它名称: 1893BFLF
Chapter 8 Pin Diagram, Listings, and Descriptions
ICS1893BF, Rev. F, 5/13/10
May, 2010
99
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
RXD0
RXD1
RXD2
RXD3
31
30
29
28
Output
Receive Data 0–3.
RXD0 is the least-significant bit and RXD3 is the most-significant bit of
the MII receive data nibble.
While the ICS1893BF asserts RXDV, the ICS1893BF transfers the
receive data signals on the RXD0–RXD3 pins to the MAC Interface
synchronously on the rising edges of RXCLK.
RXDV
32
Output
Receive Data Valid.
The ICS1893BF asserts RXDV to indicate to the MAC that data is
available on the MII Receive Bus (RXD[3:0]). The ICS1893BF:
Asserts RXDV after it detects and recovers the Start-of-Stream
delimiter, /J/K/. (For the timing reference, see Chapter 9.5.6,
De-asserts RXDV after it detects either the End-of-Stream delimiter
(/T/R/) or a signal error.
Note: RXDV is synchronous with the Receive Data Clock, RXCLK.
RXER
35
Output
Receive Error.
When the MAC Interface is in:
10M MII mode, RXER is not used.
100M MII mode, the ICS1893BF asserts a signal on the RXER pin
when either of the following two conditions are true:
– Errors are detected during the reception of valid frames
– A False Carrier is detected
Note:
1. An ICS1893BF asserts a signal on the RXER pin upon detection of a
False Carrier so that repeater applications can prevent the
propagation of a False Carrier.
2. The RXER signal always transitions synchronously with RXCLK.
3. The signal on RXER pin is conditioned by the RXTRI pin.
TXCLK
37
Output
Transmit Clock.
The ICS1893BF generates this clock signal to synchronize the transfer of
data from the MAC Interface to the ICS1893BF. When the mode is:
10Base-T, the TXCLK frequency is 2.5 MHz.
100Base-TX, the TXCLK frequency is 25 MHz.
Table 8-7. MAC Interface Pins: Media Independent Interface (MII) (Continued)
Pin
Name
Pin
Number
Pin
Type
Pin Description
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