- 您现在的位置：买卖IC网 > PDF目录9029 > ICS2059GI-02LFT (IDT, Integrated Device Technology Inc)IC CLK MULT/JITTER ATTEN 16TSSOP PDF资料下载
参数资料
| 型号： | ICS2059GI-02LFT |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC CLK MULT/JITTER ATTEN 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 漂移衰减器，多路复用器 |
| PLL： | 是 |
| 输入： | 时钟，晶体 |
| 输出： | CMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:1 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 27MHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.15 V ~ 3.45 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 2059GI-02LFT |
ICS2059-02
CLOCK MULTIPLIER AND JITTER ATTENUATOR
VCXO AND SYNTHESIZERS
IDT / ICS CLOCK MULTIPLIER AND JITTER ATTENUATOR
5
ICS2059-02
REV E 051310
A “normalized” PLL loop bandwidth may be calculated
as follows:
The “normalized” bandwidth equation above does not
take into account the effects of damping factor or the
second pole. However, it does provide a useful
approximation of filter performance.
The loop damping factor is calculated as follows:
Where:
RS = Value of resistor in loop filter (Ohms)
ICP = Charge pump current (amps)
(refer to Charge Pump Current Table, below)
N = Crystal multiplier shown in the above
table
CS = Value of capacitor C1 in loop filter (Farads)
As a general rule, the following relationship should be
maintained between components C1 and C2 in the loop
filter:
Charge Pump Current Table
Special considerations must be made in choosing loop
components CS and CP. Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
. (The optional series termination resistor
is not shown in the External Component Schematic.)
Decoupling Capacitors
As with any high-performance mixed-signal IC, the
ICS2059-02 must be isolated from system power
supply noise to perform optimally.
Decoupling capacitors of 0.01F must be connected
between each VDD and the PCB ground plane. To
further guard against interfering system supply noise,
the ICS2059-02 should use one common connection to
the PCB power plane as shown in the diagram on the
next page. The ferrite bead and bulk capacitor help
reduce lower frequency noise in the supply that can
lead to output clock phase modulation.
NBW
RS ICP
×
575
×
N
-----------------------------------------
=
345
Damping Factor
RS
625
I
CP
×
CS
×
N
-------------------------------------------
×
=
375
CP
CS
20
------
=
RSET
Charge Pump Current
(ICP)
1.4 M
10
A
680 k
20
A
540 k
25
A
120 k
100
A
相关PDF资料 |
PDF描述 |
|---|---|
| VI-24L-MY-F1 | CONVERTER MOD DC/DC 28V 50W |
| M83723/95G1203N | CONN PLUG 3POS STRAIGHT W/SCKT |
| VI-24K-MY-F4 | CONVERTER MOD DC/DC 40V 50W |
| GTC06CF-24-80S | CONN PLUG 23POS STRAIGHT W/SCKT |
| VI-24K-MY-F3 | CONVERTER MOD DC/DC 40V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS2059GI-02T | 功能描述:IC CLK MULT/JITTER ATTEN 16TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS2101M | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| ICS2101N | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| ICS2102M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Tone/Volume/Balance Control |
| ICS2115V | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Waveform Generator/Support |
发布紧急采购，3分钟左右您将得到回复。