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参数资料
| 型号： | ICS291PGLF |
| 元件分类： | XO, clock |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.173 INCH, ROHS COMPLIANT, TSSOP-20 |
| 文件页数： | 2/8页 |
| 文件大小： | 167K |
| 代理商： | ICS291PGLF |
Triple PLL Field Prog. Spread Spectrum Clock Synthesizer
MDS 291 C
2
Revision 062205
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
ICS291
PRELIMINARY INFORMATION
Pin Assignment
Pin Descriptions
13
4
12
5
11
VDD
8
9
10
GND
CLK2
CLK5
CLK1
CLK3
CLK6
17
16
VDDO2
3
S1
GND
S2
18
PDTS
1
S0
VDD
20
X2
19
14
2
7
GND
VDDO1
VDD
CLK4
15
6
20 pin (173 mil) TSSOP
X1/ICLK
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
GND
Power
Connect to ground.
2
S0
Input
Select pin 0. Internal pull-up resistor.
3
S1
Input
Select pin 1. Internal pull-up resistor.
4VDD
Power
Connect to +3.3 V.
5
VDDO1
Power
Power supply for outputs CLK1-CLK3.
6
CLK1
Output
Output clock 1. Weak internal pull-down when tri-state.
7
CLK2
Output
Output clock 2. Weak internal pull-down when tri-state.
8
CLK3
Output
Output clock 3. Weak internal pull-down when tri-state.
9
GND
Power
Connect to ground.
10
X1/ICLK
XI
Crystal input. Connect this pin to a crystal or external input clock.
11
X2
XO
Crystal Output. Connect this pin to a crystal. Float for clock input.
12
VDD
Power
Connect to +3.3 V.
13
VDDO2
Power
Power supply for outputs CLK4-CLK6.
14
CLK4
Output
Output clock 4. Weak internal pull-down when tri-state.
15
CLK5
Output
Output clock 5. Weak internal pull-down when tri-state.
16
CLK6
Output
Output clock 6. Weak internal pull-down when tri-state.
17
GND
Power
Connect to ground.
18
PDTS
Input
Power-down tri-state. Powers down entire chip and tri-states clock outputs
when low. Internal pull-up resistor.
19
VDD
Power
Connect to +3.3 V.
20
S2
Input
Select pin 2. Internal pull-up resistor.
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相关代理商/技术参数 |
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