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参数资料
| 型号： | ICS345RIPLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.150 INCH, ROHS COMPLIANT, SSOP-20 |
| 文件页数： | 6/9页 |
| 文件大小： | 207K |
| 代理商： | ICS345RIPLF |
ICS345
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
EPROM CLOCK SYNTHESIZER
IDT / ICS TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER 6
ICS345
REV K 110207
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85
° C
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are min 45% / max 55%
Note 3: IDT test mode output occurs for first 170 clock cycles on CLK7 for each PLL powered up. PDTS transition
high on select address change.
Note 4: The actual ppm error will be displayed in the VersaClock software when the programming file is generated
for the customer’s specific configuration. In general, zero ppm error can be achieved, but please note that the
device cannot improve upon the error of the input reference clock. For example, if the input crystal has 25 ppm error,
then the outputs will also have 25 ppm error.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
FIN
Fundamental crystal
5
27
MHz
Input clock
2
50
MHz
Output Frequency
VDD=3.3 V
0.25
200
MHz
Output Rise Time
tOR
20% to 80%, Note 1
1
ns
Output Fall Time
tOF
80% to 20%, Note 1
1
ns
Duty Cycle
Note 2
40
49-51
60
%
Output Frequency Synthesis
Error (Note 4)
Configuration Dependent
0
ppm
Power-up Time
PLL lock-time from
power-up, Note 3
410
ms
PDTS goes high until stable
CLK output, Spread
Spectrum Off, Note 3
0.2
2
ms
PDTS goes high until stable
CLK output, Spread
Spectrum On, Note 3
47
ms
One Sigma Clock Period Jitter
Configuration Dependent
50
ps
Maximum Absolute Jitter
tja
Deviation from Mean.
Configuration Dependent
+200
ps
Pin-to-Pin Skew
Low Skew Outputs
-250
250
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Thermal Resistance Junction to
Ambient
θJA
Still air
135
° C/W
θJA
1 m/s air flow
93
° C/W
θJA
3 m/s air flow
78
° C/W
Thermal Resistance Junction to Case
θJC
60
° C/W
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ICS345RIPLFT | 功能描述:IC VERSACLOCK SYNTHESIZER 20QSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:VersaClock™ 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| ICS345RIPT | 功能描述:IC VERSACLOCK SYNTHESIZER 20QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:VersaClock™ 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器，零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG |
| ICS345RI-XX | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
| ICS345RI-XXLF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
| ICS345RI-XXLFT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER |
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