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参数资料
| 型号： | ICS355R-XXI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.150 INCH, QSOP-20 |
| 文件页数： | 1/5页 |
| 文件大小： | 74K |
| 代理商： | ICS355R-XXI |
MDS 355 B
1
Revision 111000
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126(408) 295-9800tel www.icst.com
ICS355
Triple PLL Quick Turn Clock Synthesizer
PRELIMINARY INFORMATION
Packaged as 20 pin SSOP (QSOP)
Quick turn frequency programming allows
samples as quickly as one day
Up to 4 outputs can be low-skew
Spread-Spectrum capability included
Can include 8 selectable output frequencies
Up to 5 reference outputs
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3V
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Duty cycle of 45/55
Operating voltages of 3.3 V or 5 V
Advanced, low power CMOS process
The ICS355 QTClock generates up to 9 high
quality, high frequency clock outputs including a
reference from a low frequency crystal or clock
input. It is designed to replace crystals and crystal
oscillators in most electronic systems. The ICS355
contains a One Time Programmable (OTP) ROM
which is factory programmed with PLL divider
values to output a broad range of frequencies up to
200 MHz, allowing customer requests for different
frequencies to be shipped in 1-3 days.
Programming features include a selectable
frequency table, up to 4 low-skew outputs, and
optional Spread Spectrum on PLLA.
Using Phase-Locked-Loop (PLL) techniques, the
device runs from a standard fundamental mode,
inexpensive crystal, or clock. It can replace
multiple crystals and oscillators, saving board space
and cost.
Block Diagram
Description
Features
Crystal
or clock
input
OTP
ROM
with PLL
Divider
Values
PLLA
Spread
Spectrum
PLLB
PLLC
Crystal
Oscillator
Divide
Logic
and
Output
Control
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
PDTS (all outputs and PLLs)
X1/ICLK
X2
Capacitors are required with a crystal input.
S2:S0
3
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