参数资料
型号: ICS551MT
元件分类: 时钟及定时
英文描述: 551 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 2/8页
文件大小: 133K
代理商: ICS551MT
1 TO 4 CLOCK BUFFER
MDS 551 L
2
Revision 042606
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 297-1 201 www.icst.com
ICS551
Pin Assignment
Pin Descriptions
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01
F should be connected between VDD on pin 7 and GND on pin 6, as close to the device as possible.
A 33
series terminating resistor may be used on each clock output if the trace is longer than 1 inch.
1
2
3
ICL K
4
Q1
Q2
VDD
Q3
GND
Q4
8
7
6
5
OE
8 Pi n ( 150 mi l ) SOI C
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ICLK
Input
Clock input. Internal pull-up resistor.
2
Q1
Output
Clock output 1.
3
Q2
Output
Clock output 2.
4
Q3
Output
Clock output 3.
5
Q4
Output
Clock output 4.
6
GND
Power
Connect to ground.
7
VDD
Power
Connect to 3.3 V or 5.0 V.
8
OE
Input
Output Enable. Tri-states outputs when low. Internal pull-up resistor.
相关PDF资料
PDF描述
ICS552G-02I 552 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS552G-02LF 552 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS552G-02LF 552 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
ICS552R-01B 552 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
ICS552R-01BILF 552 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
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